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Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +05301if ARCH_ZYNQMP
2
Tien Fong Chee6fd0a712019-01-23 14:20:03 +08003config SPL_FS_FAT
Simon Glass6172e2e2016-09-12 23:18:38 -06004 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassf6de2572016-09-12 23:18:42 -06009config SPL_LIBDISK_SUPPORT
10 default y
11
Simon Glassb16c92c2016-09-12 23:18:43 -060012config SPL_LIBGENERIC_SUPPORT
13 default y
14
Simon Glassb58bfe02021-08-08 12:20:09 -060015config SPL_MMC
Alexandru Gagniucd5a75992017-04-04 10:02:58 -070016 default y if MMC_SDHCI_ZYNQ
Simon Glassbd58f1d2016-09-12 23:18:44 -060017
Simon Glassf4d60392021-08-08 12:20:12 -060018config SPL_SERIAL
Simon Glasse076d6f2016-09-12 23:18:56 -060019 default y
20
Simon Glass219d6122016-09-12 23:18:57 -060021config SPL_SPI_FLASH_SUPPORT
22 default y if ZYNQ_QSPI
23
Simon Glassa5820472021-08-08 12:20:14 -060024config SPL_SPI
Simon Glassb24fdca2016-09-12 23:18:58 -060025 default y if ZYNQ_QSPI
26
Michal Simek04b7e622015-01-15 10:01:51 +010027config SYS_BOARD
Liam Beguindda9e212021-10-20 11:25:18 -040028 string "Board name"
Michal Simek04b7e622015-01-15 10:01:51 +010029 default "zynqmp"
30
31config SYS_VENDOR
Mike Looijmans61d245c2017-01-03 09:47:52 +010032 string "Vendor name"
Michal Simek04b7e622015-01-15 10:01:51 +010033 default "xilinx"
34
35config SYS_SOC
36 default "zynqmp"
37
38config SYS_CONFIG_NAME
Michal Simek7b5413e2016-03-18 18:21:36 +010039 string "Board configuration name"
40 default "xilinx_zynqmp"
41 help
42 This option contains information about board configuration name.
43 Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
44 will be used for board configuration.
Michal Simek04b7e622015-01-15 10:01:51 +010045
Siva Durga Prasad Paladugu4628c502017-07-13 19:01:11 +053046config SYS_MEM_RSVD_FOR_MMU
47 bool "Reserve memory for MMU Table"
48 help
49 If defined this option is used to setup different space for
50 MMU table than the one which will be allocated during
51 relocation.
52
Mike Looijmans96e706f2016-09-20 11:37:24 +020053config BOOT_INIT_FILE
54 string "boot.bin init register filename"
Michal Simek5d359092016-12-16 13:00:26 +010055 depends on SPL
Mike Looijmans96e706f2016-09-20 11:37:24 +020056 default ""
57 help
58 Add register writes to boot.bin format (max 256 pairs).
59 Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
60
Michal Simekdde5a882016-10-21 12:58:17 +020061config PMUFW_INIT_FILE
62 string "PMU firmware"
63 depends on SPL
64 default ""
65 help
66 Include external PMUFW (Platform Management Unit FirmWare) to
67 a Xilinx bootable image (boot.bin).
68
Luca Ceresoli23e65002019-05-21 18:06:43 +020069config ZYNQMP_SPL_PM_CFG_OBJ_FILE
70 string "PMU firmware configuration object to load at runtime by SPL"
71 depends on SPL
72 help
73 Path to a binary PMU firmware configuration object to be linked
74 into U-Boot SPL and loaded at runtime into the PMU firmware.
75
76 The ZynqMP Power Management Unit (PMU) needs a configuration
77 object for most SoC peripherals to work. To have it loaded by
78 U-Boot SPL set here the file name (absolute path or relative to
79 the top source tree) of your configuration, which must be a
80 binary blob. It will be linked in the SPL binary and loaded
81 into the PMU firmware by U-Boot SPL during board
82 initialization.
83
84 Leave this option empty if your PMU firmware has a hard-coded
85 configuration object or you are loading it by any other means.
86
Siva Durga Prasad Paladugucafb6312018-01-12 15:35:46 +053087config ZYNQMP_NO_DDR
88 bool "Disable DDR MMU mapping"
89 help
90 This option configures MMU with no DDR to avoid speculative
91 access to DDR memory where DDR is not present.
92
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +020093config SPL_ZYNQMP_DRAM_ECC_INIT
94 bool "Initialize DRAM ECC"
95 depends on SPL
96 help
97 This option initializes all memory to 0xdeadbeef. Must be set if your
98 memory is of ECC type.
99
100config SPL_ZYNQMP_DRAM_BANK1_BASE
101 depends on SPL_ZYNQMP_DRAM_ECC_INIT
102 hex "DRAM Bank1 address"
Michal Simek70597f82023-10-26 08:34:31 +0200103 default 0x00000000
104 help
105 Start address of DRAM ECC bank1
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200106
107config SPL_ZYNQMP_DRAM_BANK1_LEN
108 depends on SPL_ZYNQMP_DRAM_ECC_INIT
109 hex "DRAM Bank1 size"
Michal Simek70597f82023-10-26 08:34:31 +0200110 default 0x80000000
111 help
112 Size in bytes of the DRAM ECC bank1
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200113
114config SPL_ZYNQMP_DRAM_BANK2_BASE
115 depends on SPL_ZYNQMP_DRAM_ECC_INIT
116 hex "DRAM Bank2 address"
Michal Simek70597f82023-10-26 08:34:31 +0200117 default 0x800000000
118 help
119 Start address of DRAM ECC bank2
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200120
121config SPL_ZYNQMP_DRAM_BANK2_LEN
122 depends on SPL_ZYNQMP_DRAM_ECC_INIT
123 hex "DRAM Bank2 size"
Michal Simek70597f82023-10-26 08:34:31 +0200124 default 0x0
125 help
126 Size in bytes of the DRAM ECC bank2. A null size takes no action.
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200127
Simon Glasscb3e4892016-07-05 17:10:13 -0600128config SYS_MALLOC_F_LEN
129 default 0x600
130
Siva Durga Prasad Paladugu9ed4e812017-07-13 19:01:10 +0530131config DEFINE_TCM_OCM_MMAP
132 bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladuguc3dfac92017-08-01 16:24:50 +0530133 default y if MP
Siva Durga Prasad Paladugu9ed4e812017-07-13 19:01:10 +0530134 help
135 This option if enabled defines the TCM and OCM memory and its
136 memory attributes in MMU table entry.
137
Michal Simekd8218792017-07-12 13:21:27 +0200138config ZYNQMP_PSU_INIT_ENABLED
139 bool "Include psu_init"
Michal Simekba6fb832022-02-17 14:28:40 +0100140 select BOARD_EARLY_INIT_F
Michal Simekd8218792017-07-12 13:21:27 +0200141 help
Michal Simek461b9312022-12-02 09:18:06 +0100142 Include psu_init to full u-boot.
143
144config SPL_ZYNQMP_PSU_INIT_ENABLED
145 bool "Include psu_init in SPL"
146 default y if SPL
147 select BOARD_EARLY_INIT_F
148 help
149 Include psu_init by default in SPL.
Michal Simekd8218792017-07-12 13:21:27 +0200150
Michal Simek94ddcaa2016-08-30 16:17:27 +0200151config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
152 bool "Overwrite SPL bootmode"
153 depends on SPL
154 help
155 Overwrite bootmode selected via boot mode pins to tell SPL what should
156 be the next boot device.
157
Jorge Ramirez-Ortiz34deca52021-10-13 15:48:00 +0200158config SPL_ZYNQMP_RESTORE_JTAG
159 bool "Restore JTAG"
160 depends on SPL
161 help
162 Booting SPL in secure mode causes the CSU to disable the JTAG interface
163 even if no eFuses were burnt. This option restores the interface if
164 possible.
165
Vipul Kumar62548002018-02-28 15:53:28 +0530166config ZYNQ_SDHCI_MAX_FREQ
167 default 200000000
168
Michal Simek94ddcaa2016-08-30 16:17:27 +0200169config SPL_ZYNQMP_ALT_BOOTMODE
170 hex
171 default 0x0 if JTAG_MODE
172 default 0x1 if QSPI_MODE_24BIT
173 default 0x2 if QSPI_MODE_32BIT
174 default 0x3 if SD_MODE
175 default 0x4 if NAND_MODE
176 default 0x5 if SD_MODE1
177 default 0x6 if EMMC_MODE
178 default 0x7 if USB_MODE
Michal Simek2740d372016-10-26 09:24:32 +0200179 default 0xa if SW_USBHOST_MODE
180 default 0xb if SW_SATA_MODE
Michal Simeke1c4d392017-02-15 09:41:53 +0100181 default 0xe if SD1_LSHFT_MODE
Michal Simek94ddcaa2016-08-30 16:17:27 +0200182
183choice
184 prompt "Boot mode"
Michal Simek8ffddc32016-08-30 16:17:27 +0200185 depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnusson3e3b16a2018-01-30 14:02:01 +0100186 default JTAG_MODE
Michal Simek94ddcaa2016-08-30 16:17:27 +0200187
188config JTAG_MODE
189 bool "JTAG_MODE"
190
191config QSPI_MODE_24BIT
192 bool "QSPI_MODE_24BIT"
193
194config QSPI_MODE_32BIT
195 bool "QSPI_MODE_32BIT"
196
197config SD_MODE
198 bool "SD_MODE"
199
200config SD_MODE1
201 bool "SD_MODE1"
202
203config NAND_MODE
204 bool "NAND_MODE"
205
206config EMMC_MODE
207 bool "EMMC_MODE"
208
209config USB_MODE
210 bool "USB"
211
Michal Simek2740d372016-10-26 09:24:32 +0200212config SW_USBHOST_MODE
213 bool "SW USBHOST_MODE"
214
215config SW_SATA_MODE
216 bool "SW SATA_MODE"
217
Michal Simeke1c4d392017-02-15 09:41:53 +0100218config SD1_LSHFT_MODE
219 bool "SD1_LSHFT_MODE"
220
Michal Simek94ddcaa2016-08-30 16:17:27 +0200221endchoice
Simon Glasscb3e4892016-07-05 17:10:13 -0600222
Michal Simek5f884852020-08-27 15:34:11 +0200223source "board/xilinx/Kconfig"
224source "board/xilinx/zynqmp/Kconfig"
225
Michal Simek04b7e622015-01-15 10:01:51 +0100226endif