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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glass4c0dc6d2013-03-05 14:39:35 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 *
5 * (C) Copyright 2000 - 2002
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Simon Glass4c0dc6d2013-03-05 14:39:35 +00007 ********************************************************************
8 * NOTE: This header file defines an interface to U-Boot. Including
9 * this (unmodified) header file in another file is considered normal
10 * use of U-Boot, and does *not* fall under the heading of "derived
11 * work".
12 ********************************************************************
13 */
14
15#ifndef __ASM_GENERIC_U_BOOT_H__
16#define __ASM_GENERIC_U_BOOT_H__
17
18/*
19 * Board information passed to Linux kernel from U-Boot
20 *
21 * include/asm-ppc/u-boot.h
22 */
23
24#ifndef __ASSEMBLY__
25
26typedef struct bd_info {
27 unsigned long bi_memstart; /* start of DRAM memory */
28 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
29 unsigned long bi_flashstart; /* start of FLASH memory */
30 unsigned long bi_flashsize; /* size of FLASH memory */
31 unsigned long bi_flashoffset; /* reserved area for startup monitor */
32 unsigned long bi_sramstart; /* start of SRAM memory */
33 unsigned long bi_sramsize; /* size of SRAM memory */
34#ifdef CONFIG_ARM
35 unsigned long bi_arm_freq; /* arm frequency */
36 unsigned long bi_dsp_freq; /* dsp core frequency */
37 unsigned long bi_ddr_freq; /* ddr frequency */
38#endif
Christophe Leroyb3510fb2018-03-16 17:20:41 +010039#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
Simon Glass4c0dc6d2013-03-05 14:39:35 +000040 unsigned long bi_immr_base; /* base of IMMR register */
41#endif
Heiko Schocher6f90e582017-06-14 05:49:40 +020042#if defined(CONFIG_M68K)
Simon Glass4c0dc6d2013-03-05 14:39:35 +000043 unsigned long bi_mbar_base; /* base of internal registers */
44#endif
45#if defined(CONFIG_MPC83xx)
46 unsigned long bi_immrbar;
47#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000048 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
49 unsigned long bi_ip_addr; /* IP Address */
50 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
51 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
52 unsigned long bi_intfreq; /* Internal Freq, in MHz */
53 unsigned long bi_busfreq; /* Bus Freq, in MHz */
54#if defined(CONFIG_CPM2)
55 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
56 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
57 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
58 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
59#endif
Heiko Schocher6f90e582017-06-14 05:49:40 +020060#if defined(CONFIG_M68K)
Simon Glass4c0dc6d2013-03-05 14:39:35 +000061 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
62 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
63#endif
Alison Wang8f6d8f32015-02-12 18:33:15 +080064#if defined(CONFIG_EXTRA_CLOCK)
65 unsigned long bi_inpfreq; /* input Freq in MHz */
66 unsigned long bi_vcofreq; /* vco Freq in MHz */
67 unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
68#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000069
70#ifdef CONFIG_HAS_ETH1
71 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
72#endif
73#ifdef CONFIG_HAS_ETH2
74 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
75#endif
76#ifdef CONFIG_HAS_ETH3
77 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
78#endif
79#ifdef CONFIG_HAS_ETH4
80 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
81#endif
82#ifdef CONFIG_HAS_ETH5
83 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
84#endif
85
Simon Glass4c0dc6d2013-03-05 14:39:35 +000086 ulong bi_arch_number; /* unique id for this board */
87 ulong bi_boot_params; /* where this board expects params */
88#ifdef CONFIG_NR_DRAM_BANKS
89 struct { /* RAM configuration */
Bin Mengc8964482015-08-06 01:31:20 -070090 phys_addr_t start;
91 phys_size_t size;
Simon Glass4c0dc6d2013-03-05 14:39:35 +000092 } bi_dram[CONFIG_NR_DRAM_BANKS];
93#endif /* CONFIG_NR_DRAM_BANKS */
94} bd_t;
95
96#endif /* __ASSEMBLY__ */
97
98#endif /* __ASM_GENERIC_U_BOOT_H__ */