Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014-2015 Samsung Electronics |
| 4 | * Przemyslaw Marczak <p.marczak@samsung.com> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 5 | */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 6 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 7 | #include <common.h> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 8 | #include <errno.h> |
| 9 | #include <dm.h> |
| 10 | #include <dm/uclass-internal.h> |
| 11 | #include <power/pmic.h> |
| 12 | #include <power/regulator.h> |
| 13 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 14 | int regulator_mode(struct udevice *dev, struct dm_regulator_mode **modep) |
| 15 | { |
| 16 | struct dm_regulator_uclass_platdata *uc_pdata; |
| 17 | |
| 18 | *modep = NULL; |
| 19 | |
| 20 | uc_pdata = dev_get_uclass_platdata(dev); |
| 21 | if (!uc_pdata) |
| 22 | return -ENXIO; |
| 23 | |
| 24 | *modep = uc_pdata->mode; |
| 25 | return uc_pdata->mode_count; |
| 26 | } |
| 27 | |
| 28 | int regulator_get_value(struct udevice *dev) |
| 29 | { |
| 30 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 31 | |
| 32 | if (!ops || !ops->get_value) |
| 33 | return -ENOSYS; |
| 34 | |
| 35 | return ops->get_value(dev); |
| 36 | } |
| 37 | |
| 38 | int regulator_set_value(struct udevice *dev, int uV) |
| 39 | { |
| 40 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Keerthy | c6e6669 | 2016-10-26 13:42:31 +0530 | [diff] [blame] | 41 | struct dm_regulator_uclass_platdata *uc_pdata; |
| 42 | |
| 43 | uc_pdata = dev_get_uclass_platdata(dev); |
| 44 | if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV) |
| 45 | return -EINVAL; |
| 46 | if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV) |
| 47 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 48 | |
| 49 | if (!ops || !ops->set_value) |
| 50 | return -ENOSYS; |
| 51 | |
| 52 | return ops->set_value(dev, uV); |
| 53 | } |
| 54 | |
Keerthy | 162c02e | 2016-10-26 13:42:30 +0530 | [diff] [blame] | 55 | /* |
| 56 | * To be called with at most caution as there is no check |
| 57 | * before setting the actual voltage value. |
| 58 | */ |
| 59 | int regulator_set_value_force(struct udevice *dev, int uV) |
| 60 | { |
| 61 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 62 | |
| 63 | if (!ops || !ops->set_value) |
| 64 | return -ENOSYS; |
| 65 | |
| 66 | return ops->set_value(dev, uV); |
| 67 | } |
| 68 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 69 | int regulator_get_current(struct udevice *dev) |
| 70 | { |
| 71 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 72 | |
| 73 | if (!ops || !ops->get_current) |
| 74 | return -ENOSYS; |
| 75 | |
| 76 | return ops->get_current(dev); |
| 77 | } |
| 78 | |
| 79 | int regulator_set_current(struct udevice *dev, int uA) |
| 80 | { |
| 81 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Keerthy | ce152be | 2016-10-26 13:42:32 +0530 | [diff] [blame] | 82 | struct dm_regulator_uclass_platdata *uc_pdata; |
| 83 | |
| 84 | uc_pdata = dev_get_uclass_platdata(dev); |
| 85 | if (uc_pdata->min_uA != -ENODATA && uA < uc_pdata->min_uA) |
| 86 | return -EINVAL; |
| 87 | if (uc_pdata->max_uA != -ENODATA && uA > uc_pdata->max_uA) |
| 88 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 89 | |
| 90 | if (!ops || !ops->set_current) |
| 91 | return -ENOSYS; |
| 92 | |
| 93 | return ops->set_current(dev, uA); |
| 94 | } |
| 95 | |
Keerthy | 23be7fb | 2017-06-13 09:53:45 +0530 | [diff] [blame] | 96 | int regulator_get_enable(struct udevice *dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 97 | { |
| 98 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 99 | |
| 100 | if (!ops || !ops->get_enable) |
| 101 | return -ENOSYS; |
| 102 | |
| 103 | return ops->get_enable(dev); |
| 104 | } |
| 105 | |
| 106 | int regulator_set_enable(struct udevice *dev, bool enable) |
| 107 | { |
| 108 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Patrick Delaunay | d7585f2 | 2018-11-15 13:45:31 +0100 | [diff] [blame] | 109 | struct dm_regulator_uclass_platdata *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 110 | |
| 111 | if (!ops || !ops->set_enable) |
| 112 | return -ENOSYS; |
| 113 | |
Patrick Delaunay | d7585f2 | 2018-11-15 13:45:31 +0100 | [diff] [blame] | 114 | uc_pdata = dev_get_uclass_platdata(dev); |
| 115 | if (!enable && uc_pdata->always_on) |
| 116 | return -EACCES; |
| 117 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 118 | return ops->set_enable(dev, enable); |
| 119 | } |
| 120 | |
| 121 | int regulator_get_mode(struct udevice *dev) |
| 122 | { |
| 123 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 124 | |
| 125 | if (!ops || !ops->get_mode) |
| 126 | return -ENOSYS; |
| 127 | |
| 128 | return ops->get_mode(dev); |
| 129 | } |
| 130 | |
| 131 | int regulator_set_mode(struct udevice *dev, int mode) |
| 132 | { |
| 133 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 134 | |
| 135 | if (!ops || !ops->set_mode) |
| 136 | return -ENOSYS; |
| 137 | |
| 138 | return ops->set_mode(dev, mode); |
| 139 | } |
| 140 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 141 | int regulator_get_by_platname(const char *plat_name, struct udevice **devp) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 142 | { |
| 143 | struct dm_regulator_uclass_platdata *uc_pdata; |
| 144 | struct udevice *dev; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 145 | int ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 146 | |
| 147 | *devp = NULL; |
| 148 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 149 | for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; |
| 150 | ret = uclass_find_next_device(&dev)) { |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 151 | if (ret) { |
| 152 | debug("regulator %s, ret=%d\n", dev->name, ret); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 153 | continue; |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 154 | } |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 155 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 156 | uc_pdata = dev_get_uclass_platdata(dev); |
| 157 | if (!uc_pdata || strcmp(plat_name, uc_pdata->name)) |
| 158 | continue; |
| 159 | |
| 160 | return uclass_get_device_tail(dev, 0, devp); |
| 161 | } |
| 162 | |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 163 | debug("%s: can't find: %s, ret=%d\n", __func__, plat_name, ret); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 164 | |
| 165 | return -ENODEV; |
| 166 | } |
| 167 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 168 | int regulator_get_by_devname(const char *devname, struct udevice **devp) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 169 | { |
| 170 | return uclass_get_device_by_name(UCLASS_REGULATOR, devname, devp); |
| 171 | } |
| 172 | |
Przemyslaw Marczak | c900103 | 2015-10-27 13:07:59 +0100 | [diff] [blame] | 173 | int device_get_supply_regulator(struct udevice *dev, const char *supply_name, |
| 174 | struct udevice **devp) |
| 175 | { |
| 176 | return uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, |
| 177 | supply_name, devp); |
| 178 | } |
| 179 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 180 | int regulator_autoset(struct udevice *dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 181 | { |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 182 | struct dm_regulator_uclass_platdata *uc_pdata; |
| 183 | int ret = 0; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 184 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 185 | uc_pdata = dev_get_uclass_platdata(dev); |
| 186 | if (!uc_pdata->always_on && !uc_pdata->boot_on) |
| 187 | return -EMEDIUMTYPE; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 188 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 189 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) |
| 190 | ret = regulator_set_value(dev, uc_pdata->min_uV); |
| 191 | if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA)) |
| 192 | ret = regulator_set_current(dev, uc_pdata->min_uA); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 193 | |
| 194 | if (!ret) |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 195 | ret = regulator_set_enable(dev, true); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 196 | |
| 197 | return ret; |
| 198 | } |
| 199 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 200 | static void regulator_show(struct udevice *dev, int ret) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 201 | { |
| 202 | struct dm_regulator_uclass_platdata *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 203 | |
| 204 | uc_pdata = dev_get_uclass_platdata(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 205 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 206 | printf("%s@%s: ", dev->name, uc_pdata->name); |
| 207 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) |
| 208 | printf("set %d uV", uc_pdata->min_uV); |
| 209 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA) |
| 210 | printf("; set %d uA", uc_pdata->min_uA); |
| 211 | printf("; enabling"); |
| 212 | if (ret) |
Simon Glass | 46ad8cb | 2016-01-21 19:43:58 -0700 | [diff] [blame] | 213 | printf(" (ret: %d)", ret); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 214 | printf("\n"); |
| 215 | } |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 216 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 217 | int regulator_autoset_by_name(const char *platname, struct udevice **devp) |
| 218 | { |
| 219 | struct udevice *dev; |
| 220 | int ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 221 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 222 | ret = regulator_get_by_platname(platname, &dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 223 | if (devp) |
| 224 | *devp = dev; |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 225 | if (ret) { |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 226 | debug("Can get the regulator: %s (err=%d)\n", platname, ret); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 227 | return ret; |
| 228 | } |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 229 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 230 | return regulator_autoset(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 231 | } |
| 232 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 233 | int regulator_list_autoset(const char *list_platname[], |
| 234 | struct udevice *list_devp[], |
| 235 | bool verbose) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 236 | { |
| 237 | struct udevice *dev; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 238 | int error = 0, i = 0, ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 239 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 240 | while (list_platname[i]) { |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 241 | ret = regulator_autoset_by_name(list_platname[i], &dev); |
| 242 | if (ret != -EMEDIUMTYPE && verbose) |
| 243 | regulator_show(dev, ret); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 244 | if (ret & !error) |
| 245 | error = ret; |
| 246 | |
| 247 | if (list_devp) |
| 248 | list_devp[i] = dev; |
| 249 | |
| 250 | i++; |
| 251 | } |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 252 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 253 | return error; |
| 254 | } |
| 255 | |
| 256 | static bool regulator_name_is_unique(struct udevice *check_dev, |
| 257 | const char *check_name) |
| 258 | { |
| 259 | struct dm_regulator_uclass_platdata *uc_pdata; |
| 260 | struct udevice *dev; |
| 261 | int check_len = strlen(check_name); |
| 262 | int ret; |
| 263 | int len; |
| 264 | |
| 265 | for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; |
| 266 | ret = uclass_find_next_device(&dev)) { |
| 267 | if (ret || dev == check_dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 268 | continue; |
| 269 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 270 | uc_pdata = dev_get_uclass_platdata(dev); |
| 271 | len = strlen(uc_pdata->name); |
| 272 | if (len != check_len) |
| 273 | continue; |
| 274 | |
| 275 | if (!strcmp(uc_pdata->name, check_name)) |
| 276 | return false; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 277 | } |
| 278 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 279 | return true; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 280 | } |
| 281 | |
| 282 | static int regulator_post_bind(struct udevice *dev) |
| 283 | { |
| 284 | struct dm_regulator_uclass_platdata *uc_pdata; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 285 | const char *property = "regulator-name"; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 286 | |
| 287 | uc_pdata = dev_get_uclass_platdata(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 288 | |
| 289 | /* Regulator's mandatory constraint */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 290 | uc_pdata->name = dev_read_string(dev, property); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 291 | if (!uc_pdata->name) { |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 292 | debug("%s: dev '%s' has no property '%s'\n", |
| 293 | __func__, dev->name, property); |
| 294 | uc_pdata->name = dev_read_name(dev); |
Peng Fan | cd672d4 | 2015-08-07 16:43:42 +0800 | [diff] [blame] | 295 | if (!uc_pdata->name) |
| 296 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 297 | } |
| 298 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 299 | if (regulator_name_is_unique(dev, uc_pdata->name)) |
| 300 | return 0; |
| 301 | |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 302 | debug("'%s' of dev: '%s', has nonunique value: '%s\n", |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 303 | property, dev->name, uc_pdata->name); |
| 304 | |
| 305 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 306 | } |
| 307 | |
| 308 | static int regulator_pre_probe(struct udevice *dev) |
| 309 | { |
| 310 | struct dm_regulator_uclass_platdata *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 311 | |
| 312 | uc_pdata = dev_get_uclass_platdata(dev); |
| 313 | if (!uc_pdata) |
| 314 | return -ENXIO; |
| 315 | |
| 316 | /* Regulator's optional constraints */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 317 | uc_pdata->min_uV = dev_read_u32_default(dev, "regulator-min-microvolt", |
| 318 | -ENODATA); |
| 319 | uc_pdata->max_uV = dev_read_u32_default(dev, "regulator-max-microvolt", |
| 320 | -ENODATA); |
| 321 | uc_pdata->min_uA = dev_read_u32_default(dev, "regulator-min-microamp", |
| 322 | -ENODATA); |
| 323 | uc_pdata->max_uA = dev_read_u32_default(dev, "regulator-max-microamp", |
| 324 | -ENODATA); |
| 325 | uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on"); |
| 326 | uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on"); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 327 | |
Simon Glass | 991f9bc | 2015-06-23 15:38:57 -0600 | [diff] [blame] | 328 | /* Those values are optional (-ENODATA if unset) */ |
| 329 | if ((uc_pdata->min_uV != -ENODATA) && |
| 330 | (uc_pdata->max_uV != -ENODATA) && |
| 331 | (uc_pdata->min_uV == uc_pdata->max_uV)) |
| 332 | uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UV; |
| 333 | |
| 334 | /* Those values are optional (-ENODATA if unset) */ |
| 335 | if ((uc_pdata->min_uA != -ENODATA) && |
| 336 | (uc_pdata->max_uA != -ENODATA) && |
| 337 | (uc_pdata->min_uA == uc_pdata->max_uA)) |
| 338 | uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UA; |
| 339 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 340 | return 0; |
| 341 | } |
| 342 | |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 343 | int regulators_enable_boot_on(bool verbose) |
| 344 | { |
| 345 | struct udevice *dev; |
| 346 | struct uclass *uc; |
| 347 | int ret; |
| 348 | |
| 349 | ret = uclass_get(UCLASS_REGULATOR, &uc); |
| 350 | if (ret) |
| 351 | return ret; |
| 352 | for (uclass_first_device(UCLASS_REGULATOR, &dev); |
Simon Glass | c7298e7 | 2016-02-11 13:23:26 -0700 | [diff] [blame] | 353 | dev; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 354 | uclass_next_device(&dev)) { |
| 355 | ret = regulator_autoset(dev); |
Simon Glass | f55c951 | 2015-07-02 18:16:06 -0600 | [diff] [blame] | 356 | if (ret == -EMEDIUMTYPE) { |
| 357 | ret = 0; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 358 | continue; |
Simon Glass | f55c951 | 2015-07-02 18:16:06 -0600 | [diff] [blame] | 359 | } |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 360 | if (verbose) |
| 361 | regulator_show(dev, ret); |
Simon Glass | d6eddad | 2016-01-21 19:43:59 -0700 | [diff] [blame] | 362 | if (ret == -ENOSYS) |
| 363 | ret = 0; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 364 | } |
| 365 | |
| 366 | return ret; |
| 367 | } |
| 368 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 369 | UCLASS_DRIVER(regulator) = { |
| 370 | .id = UCLASS_REGULATOR, |
| 371 | .name = "regulator", |
| 372 | .post_bind = regulator_post_bind, |
| 373 | .pre_probe = regulator_pre_probe, |
| 374 | .per_device_platdata_auto_alloc_size = |
| 375 | sizeof(struct dm_regulator_uclass_platdata), |
| 376 | }; |