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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -04002/*
3 * Power and Sleep Controller (PSC) functions.
4 *
5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7 * Copyright (C) 2004 Texas Instruments.
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -04008 */
9
10#include <common.h>
11#include <asm/arch/hardware.h>
Sekhar Nori302fc2f2009-11-12 11:07:22 -050012#include <asm/io.h>
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040013
14/*
David Brownell5f02add2009-05-15 23:44:08 +020015 * The PSC manages three inputs to a "module" which may be a peripheral or
16 * CPU. Those inputs are the module's: clock; reset signal; and sometimes
17 * its power domain. For our purposes, we only care whether clock and power
18 * are active, and the module is out of reset.
19 *
20 * DaVinci chips may include two separate power domains: "Always On" and "DSP".
21 * Chips without a DSP generally have only one domain.
22 *
23 * The "Always On" power domain is always on when the chip is on, and is
24 * powered by the VDD pins (on DM644X). The majority of DaVinci modules
25 * lie within the "Always On" power domain.
26 *
27 * A separate domain called the "DSP" domain houses the C64x+ and other video
28 * hardware such as VICP. In some chips, the "DSP" domain is not always on.
29 * The "DSP" power domain is powered by the CVDDDSP pins (on DM644X).
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040030 */
31
32/* Works on Always On power domain only (no PD argument) */
Christian Riescha4cd16f2011-10-12 21:26:43 +000033static void lpsc_transition(unsigned int id, unsigned int state)
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040034{
Sekhar Nori302fc2f2009-11-12 11:07:22 -050035 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
Sekhar Nori302fc2f2009-11-12 11:07:22 -050036 struct davinci_psc_regs *psc_regs;
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040037
Sekhar Nori302fc2f2009-11-12 11:07:22 -050038 if (id < DAVINCI_LPSC_PSC1_BASE) {
39 if (id >= PSC_PSC0_MODULE_ID_CNT)
40 return;
41 psc_regs = davinci_psc0_regs;
42 mdstat = &psc_regs->psc0.mdstat[id];
43 mdctl = &psc_regs->psc0.mdctl[id];
44 } else {
45 id -= DAVINCI_LPSC_PSC1_BASE;
46 if (id >= PSC_PSC1_MODULE_ID_CNT)
47 return;
48 psc_regs = davinci_psc1_regs;
49 mdstat = &psc_regs->psc1.mdstat[id];
50 mdctl = &psc_regs->psc1.mdctl[id];
51 }
52 ptstat = &psc_regs->ptstat;
53 ptcmd = &psc_regs->ptcmd;
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040054
Sekhar Nori302fc2f2009-11-12 11:07:22 -050055 while (readl(ptstat) & 0x01)
David Brownell5f02add2009-05-15 23:44:08 +020056 continue;
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040057
Christian Riescha4cd16f2011-10-12 21:26:43 +000058 if ((readl(mdstat) & PSC_MDSTAT_STATE) == state)
59 return; /* Already in that state */
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040060
Christian Riescha4cd16f2011-10-12 21:26:43 +000061 writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl);
Sekhar Nori302fc2f2009-11-12 11:07:22 -050062 writel(0x01, ptcmd);
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040063
Sekhar Nori302fc2f2009-11-12 11:07:22 -050064 while (readl(ptstat) & 0x01)
David Brownell5f02add2009-05-15 23:44:08 +020065 continue;
Christian Riescha4cd16f2011-10-12 21:26:43 +000066 while ((readl(mdstat) & PSC_MDSTAT_STATE) != state)
David Brownell5f02add2009-05-15 23:44:08 +020067 continue;
Hugo Villeneuve4e352ef2008-07-11 15:10:13 -040068}
69
Christian Riescha4cd16f2011-10-12 21:26:43 +000070void lpsc_on(unsigned int id)
71{
72 lpsc_transition(id, 0x03);
73}
74
75void lpsc_syncreset(unsigned int id)
76{
77 lpsc_transition(id, 0x01);
78}
79
Sughosh Ganu282e2af2012-08-09 10:45:20 +000080void lpsc_disable(unsigned int id)
81{
82 lpsc_transition(id, 0x0);
83}