Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2014 - 2015 Xilinx, Inc. |
| 4 | * Michal Simek <michal.simek@xilinx.com> |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Michal Simek | d54b1af | 2015-09-30 17:26:55 +0200 | [diff] [blame] | 8 | #include <sata.h> |
Michal Simek | b216cc1 | 2015-07-23 13:27:40 +0200 | [diff] [blame] | 9 | #include <ahci.h> |
| 10 | #include <scsi.h> |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 11 | #include <malloc.h> |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 12 | #include <wdt.h> |
Michal Simek | c23d3f8 | 2015-11-05 08:34:35 +0100 | [diff] [blame] | 13 | #include <asm/arch/clk.h> |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 14 | #include <asm/arch/hardware.h> |
| 15 | #include <asm/arch/sys_proto.h> |
Michal Simek | f2f0864 | 2018-01-10 09:36:09 +0100 | [diff] [blame] | 16 | #include <asm/arch/psu_init_gpl.h> |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 17 | #include <asm/io.h> |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 18 | #include <dm/device.h> |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 19 | #include <dm/uclass.h> |
Siva Durga Prasad Paladugu | ba1f68e | 2015-08-04 13:03:26 +0530 | [diff] [blame] | 20 | #include <usb.h> |
| 21 | #include <dwc3-uboot.h> |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 22 | #include <zynqmppl.h> |
Michal Simek | 76d0a77 | 2016-09-01 11:16:40 +0200 | [diff] [blame] | 23 | #include <g_dnl.h> |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 24 | |
| 25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 27 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) |
Stefan Roese | f3170d1 | 2019-04-03 09:12:48 +0200 | [diff] [blame^] | 28 | static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 29 | #endif |
| 30 | |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 31 | #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ |
| 32 | !defined(CONFIG_SPL_BUILD) |
| 33 | static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC; |
| 34 | |
| 35 | static const struct { |
Michal Simek | 6908b86 | 2017-11-06 12:55:59 +0100 | [diff] [blame] | 36 | u32 id; |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 37 | u32 ver; |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 38 | char *name; |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 39 | bool evexists; |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 40 | } zynqmp_devices[] = { |
| 41 | { |
| 42 | .id = 0x10, |
| 43 | .name = "3eg", |
| 44 | }, |
| 45 | { |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 46 | .id = 0x10, |
| 47 | .ver = 0x2c, |
| 48 | .name = "3cg", |
| 49 | }, |
| 50 | { |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 51 | .id = 0x11, |
| 52 | .name = "2eg", |
| 53 | }, |
| 54 | { |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 55 | .id = 0x11, |
| 56 | .ver = 0x2c, |
| 57 | .name = "2cg", |
| 58 | }, |
| 59 | { |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 60 | .id = 0x20, |
| 61 | .name = "5ev", |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 62 | .evexists = 1, |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 63 | }, |
| 64 | { |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 65 | .id = 0x20, |
| 66 | .ver = 0x100, |
| 67 | .name = "5eg", |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 68 | .evexists = 1, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 69 | }, |
| 70 | { |
| 71 | .id = 0x20, |
| 72 | .ver = 0x12c, |
| 73 | .name = "5cg", |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 74 | .evexists = 1, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 75 | }, |
| 76 | { |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 77 | .id = 0x21, |
| 78 | .name = "4ev", |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 79 | .evexists = 1, |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 80 | }, |
| 81 | { |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 82 | .id = 0x21, |
| 83 | .ver = 0x100, |
| 84 | .name = "4eg", |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 85 | .evexists = 1, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 86 | }, |
| 87 | { |
| 88 | .id = 0x21, |
| 89 | .ver = 0x12c, |
| 90 | .name = "4cg", |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 91 | .evexists = 1, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 92 | }, |
| 93 | { |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 94 | .id = 0x30, |
| 95 | .name = "7ev", |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 96 | .evexists = 1, |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 97 | }, |
| 98 | { |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 99 | .id = 0x30, |
| 100 | .ver = 0x100, |
| 101 | .name = "7eg", |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 102 | .evexists = 1, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 103 | }, |
| 104 | { |
| 105 | .id = 0x30, |
| 106 | .ver = 0x12c, |
| 107 | .name = "7cg", |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 108 | .evexists = 1, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 109 | }, |
| 110 | { |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 111 | .id = 0x38, |
| 112 | .name = "9eg", |
| 113 | }, |
| 114 | { |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 115 | .id = 0x38, |
| 116 | .ver = 0x2c, |
| 117 | .name = "9cg", |
| 118 | }, |
| 119 | { |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 120 | .id = 0x39, |
| 121 | .name = "6eg", |
| 122 | }, |
| 123 | { |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 124 | .id = 0x39, |
| 125 | .ver = 0x2c, |
| 126 | .name = "6cg", |
| 127 | }, |
| 128 | { |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 129 | .id = 0x40, |
| 130 | .name = "11eg", |
| 131 | }, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 132 | { /* For testing purpose only */ |
| 133 | .id = 0x50, |
| 134 | .ver = 0x2c, |
| 135 | .name = "15cg", |
| 136 | }, |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 137 | { |
| 138 | .id = 0x50, |
| 139 | .name = "15eg", |
| 140 | }, |
| 141 | { |
| 142 | .id = 0x58, |
| 143 | .name = "19eg", |
| 144 | }, |
| 145 | { |
| 146 | .id = 0x59, |
| 147 | .name = "17eg", |
| 148 | }, |
Michal Simek | b510e53 | 2017-06-02 08:08:59 +0200 | [diff] [blame] | 149 | { |
| 150 | .id = 0x61, |
| 151 | .name = "21dr", |
| 152 | }, |
| 153 | { |
| 154 | .id = 0x63, |
| 155 | .name = "23dr", |
| 156 | }, |
| 157 | { |
| 158 | .id = 0x65, |
| 159 | .name = "25dr", |
| 160 | }, |
| 161 | { |
| 162 | .id = 0x64, |
| 163 | .name = "27dr", |
| 164 | }, |
| 165 | { |
| 166 | .id = 0x60, |
| 167 | .name = "28dr", |
| 168 | }, |
| 169 | { |
| 170 | .id = 0x62, |
| 171 | .name = "29dr", |
| 172 | }, |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 173 | }; |
Siva Durga Prasad Paladugu | 8d52653 | 2017-07-25 11:51:37 +0530 | [diff] [blame] | 174 | #endif |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 175 | |
Siva Durga Prasad Paladugu | cd35d52 | 2017-07-25 11:51:38 +0530 | [diff] [blame] | 176 | int chip_id(unsigned char id) |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 177 | { |
| 178 | struct pt_regs regs; |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 179 | int val = -EINVAL; |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 180 | |
Siva Durga Prasad Paladugu | 8d52653 | 2017-07-25 11:51:37 +0530 | [diff] [blame] | 181 | if (current_el() != 3) { |
| 182 | regs.regs[0] = ZYNQMP_SIP_SVC_CSU_DMA_CHIPID; |
| 183 | regs.regs[1] = 0; |
| 184 | regs.regs[2] = 0; |
| 185 | regs.regs[3] = 0; |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 186 | |
Siva Durga Prasad Paladugu | 8d52653 | 2017-07-25 11:51:37 +0530 | [diff] [blame] | 187 | smc_call(®s); |
| 188 | |
| 189 | /* |
| 190 | * SMC returns: |
| 191 | * regs[0][31:0] = status of the operation |
| 192 | * regs[0][63:32] = CSU.IDCODE register |
| 193 | * regs[1][31:0] = CSU.version register |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 194 | * regs[1][63:32] = CSU.IDCODE2 register |
Siva Durga Prasad Paladugu | 8d52653 | 2017-07-25 11:51:37 +0530 | [diff] [blame] | 195 | */ |
| 196 | switch (id) { |
| 197 | case IDCODE: |
| 198 | regs.regs[0] = upper_32_bits(regs.regs[0]); |
| 199 | regs.regs[0] &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | |
| 200 | ZYNQMP_CSU_IDCODE_SVD_MASK; |
| 201 | regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; |
| 202 | val = regs.regs[0]; |
| 203 | break; |
| 204 | case VERSION: |
| 205 | regs.regs[1] = lower_32_bits(regs.regs[1]); |
| 206 | regs.regs[1] &= ZYNQMP_CSU_SILICON_VER_MASK; |
| 207 | val = regs.regs[1]; |
| 208 | break; |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 209 | case IDCODE2: |
| 210 | regs.regs[1] = lower_32_bits(regs.regs[1]); |
| 211 | regs.regs[1] >>= ZYNQMP_CSU_VERSION_EMPTY_SHIFT; |
| 212 | val = regs.regs[1]; |
| 213 | break; |
Siva Durga Prasad Paladugu | 8d52653 | 2017-07-25 11:51:37 +0530 | [diff] [blame] | 214 | default: |
| 215 | printf("%s, Invalid Req:0x%x\n", __func__, id); |
| 216 | } |
| 217 | } else { |
| 218 | switch (id) { |
| 219 | case IDCODE: |
| 220 | val = readl(ZYNQMP_CSU_IDCODE_ADDR); |
| 221 | val &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | |
| 222 | ZYNQMP_CSU_IDCODE_SVD_MASK; |
| 223 | val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; |
| 224 | break; |
| 225 | case VERSION: |
| 226 | val = readl(ZYNQMP_CSU_VER_ADDR); |
| 227 | val &= ZYNQMP_CSU_SILICON_VER_MASK; |
| 228 | break; |
| 229 | default: |
| 230 | printf("%s, Invalid Req:0x%x\n", __func__, id); |
| 231 | } |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 232 | } |
Soren Brinkmann | d7696a5 | 2016-09-29 11:44:41 -0700 | [diff] [blame] | 233 | |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 234 | return val; |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 235 | } |
| 236 | |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 237 | #define ZYNQMP_VERSION_SIZE 9 |
| 238 | #define ZYNQMP_PL_STATUS_BIT 9 |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 239 | #define ZYNQMP_IPDIS_VCU_BIT 8 |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 240 | #define ZYNQMP_PL_STATUS_MASK BIT(ZYNQMP_PL_STATUS_BIT) |
| 241 | #define ZYNQMP_CSU_VERSION_MASK ~(ZYNQMP_PL_STATUS_MASK) |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 242 | #define ZYNQMP_CSU_VCUDIS_VER_MASK ZYNQMP_CSU_VERSION_MASK & \ |
| 243 | ~BIT(ZYNQMP_IPDIS_VCU_BIT) |
| 244 | #define MAX_VARIANTS_EV 3 |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 245 | |
Siva Durga Prasad Paladugu | 8d52653 | 2017-07-25 11:51:37 +0530 | [diff] [blame] | 246 | #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ |
| 247 | !defined(CONFIG_SPL_BUILD) |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 248 | static char *zynqmp_get_silicon_idcode_name(void) |
| 249 | { |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 250 | u32 i, id, ver, j; |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 251 | char *buf; |
| 252 | static char name[ZYNQMP_VERSION_SIZE]; |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 253 | |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 254 | id = chip_id(IDCODE); |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 255 | ver = chip_id(IDCODE2); |
| 256 | |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 257 | for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 258 | if (zynqmp_devices[i].id == id) { |
| 259 | if (zynqmp_devices[i].evexists && |
| 260 | !(ver & ZYNQMP_PL_STATUS_MASK)) |
| 261 | break; |
| 262 | if (zynqmp_devices[i].ver == (ver & |
| 263 | ZYNQMP_CSU_VERSION_MASK)) |
| 264 | break; |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 265 | } |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 266 | } |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 267 | |
| 268 | if (i >= ARRAY_SIZE(zynqmp_devices)) |
| 269 | return "unknown"; |
| 270 | |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 271 | strncat(name, "zu", 2); |
| 272 | if (!zynqmp_devices[i].evexists || |
| 273 | (ver & ZYNQMP_PL_STATUS_MASK)) { |
| 274 | strncat(name, zynqmp_devices[i].name, |
| 275 | ZYNQMP_VERSION_SIZE - 3); |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 276 | return name; |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 277 | } |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 278 | |
Siva Durga Prasad Paladugu | 951c019 | 2018-10-26 17:47:55 +0530 | [diff] [blame] | 279 | /* |
| 280 | * Here we are means, PL not powered up and ev variant |
| 281 | * exists. So, we need to ignore VCU disable bit(8) in |
| 282 | * version and findout if its CG or EG/EV variant. |
| 283 | */ |
| 284 | for (j = 0; j < MAX_VARIANTS_EV; j++, i++) { |
| 285 | if ((zynqmp_devices[i].ver & ~BIT(ZYNQMP_IPDIS_VCU_BIT)) == |
| 286 | (ver & ZYNQMP_CSU_VCUDIS_VER_MASK)) { |
| 287 | strncat(name, zynqmp_devices[i].name, |
| 288 | ZYNQMP_VERSION_SIZE - 3); |
| 289 | break; |
| 290 | } |
| 291 | } |
| 292 | |
| 293 | if (j >= MAX_VARIANTS_EV) |
| 294 | return "unknown"; |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 295 | |
| 296 | if (strstr(name, "eg") || strstr(name, "ev")) { |
| 297 | buf = strstr(name, "e"); |
| 298 | *buf = '\0'; |
| 299 | } |
| 300 | |
| 301 | return name; |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 302 | } |
| 303 | #endif |
| 304 | |
Michal Simek | 8b35330 | 2017-02-07 14:32:26 +0100 | [diff] [blame] | 305 | int board_early_init_f(void) |
| 306 | { |
Michal Simek | c8785f2 | 2018-01-10 11:48:48 +0100 | [diff] [blame] | 307 | int ret = 0; |
Michal Simek | 8b35330 | 2017-02-07 14:32:26 +0100 | [diff] [blame] | 308 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CLK_ZYNQMP) |
Siva Durga Prasad Paladugu | 8406d47 | 2018-08-21 15:44:49 +0530 | [diff] [blame] | 309 | u32 pm_api_version; |
| 310 | |
| 311 | pm_api_version = zynqmp_pmufw_version(); |
| 312 | printf("PMUFW:\tv%d.%d\n", |
| 313 | pm_api_version >> ZYNQMP_PM_VERSION_MAJOR_SHIFT, |
| 314 | pm_api_version & ZYNQMP_PM_VERSION_MINOR_MASK); |
| 315 | |
| 316 | if (pm_api_version < ZYNQMP_PM_VERSION) |
| 317 | panic("PMUFW version error. Expected: v%d.%d\n", |
| 318 | ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR); |
Michal Simek | 8b35330 | 2017-02-07 14:32:26 +0100 | [diff] [blame] | 319 | #endif |
Michal Simek | e0f3610 | 2017-07-12 13:08:41 +0200 | [diff] [blame] | 320 | |
Michal Simek | 1a1ab5a | 2018-01-15 12:52:59 +0100 | [diff] [blame] | 321 | #if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED) |
Michal Simek | c8785f2 | 2018-01-10 11:48:48 +0100 | [diff] [blame] | 322 | ret = psu_init(); |
Michal Simek | e0f3610 | 2017-07-12 13:08:41 +0200 | [diff] [blame] | 323 | #endif |
| 324 | |
Michal Simek | c8785f2 | 2018-01-10 11:48:48 +0100 | [diff] [blame] | 325 | return ret; |
Michal Simek | 8b35330 | 2017-02-07 14:32:26 +0100 | [diff] [blame] | 326 | } |
| 327 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 328 | int board_init(void) |
| 329 | { |
Michal Simek | fb7242d | 2015-06-22 14:31:06 +0200 | [diff] [blame] | 330 | printf("EL Level:\tEL%d\n", current_el()); |
| 331 | |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 332 | #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ |
| 333 | !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FPGA_SUPPORT) && \ |
| 334 | defined(CONFIG_SPL_BUILD)) |
| 335 | if (current_el() != 3) { |
Siva Durga Prasad Paladugu | ba2622d | 2018-03-02 16:20:10 +0530 | [diff] [blame] | 336 | zynqmppl.name = zynqmp_get_silicon_idcode_name(); |
Michal Simek | 8111aff | 2016-02-01 15:05:58 +0100 | [diff] [blame] | 337 | printf("Chip ID:\t%s\n", zynqmppl.name); |
| 338 | fpga_init(); |
| 339 | fpga_add(fpga_xilinx, &zynqmppl); |
| 340 | } |
| 341 | #endif |
| 342 | |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 343 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) |
Michal Simek | 169d34b | 2018-07-11 08:30:07 +0200 | [diff] [blame] | 344 | if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { |
| 345 | debug("Watchdog: Not found by seq!\n"); |
| 346 | if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { |
| 347 | puts("Watchdog: Not found!\n"); |
| 348 | return 0; |
| 349 | } |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 350 | } |
Michal Simek | 169d34b | 2018-07-11 08:30:07 +0200 | [diff] [blame] | 351 | |
| 352 | wdt_start(watchdog_dev, 0, 0); |
| 353 | puts("Watchdog: Started\n"); |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 354 | #endif |
| 355 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 356 | return 0; |
| 357 | } |
| 358 | |
Michal Simek | bf0f9ca | 2018-04-19 15:43:38 +0200 | [diff] [blame] | 359 | #ifdef CONFIG_WATCHDOG |
| 360 | /* Called by macro WATCHDOG_RESET */ |
| 361 | void watchdog_reset(void) |
| 362 | { |
| 363 | # if !defined(CONFIG_SPL_BUILD) |
| 364 | static ulong next_reset; |
| 365 | ulong now; |
| 366 | |
| 367 | if (!watchdog_dev) |
| 368 | return; |
| 369 | |
| 370 | now = timer_get_us(); |
| 371 | |
| 372 | /* Do not reset the watchdog too often */ |
| 373 | if (now > next_reset) { |
| 374 | wdt_reset(watchdog_dev); |
| 375 | next_reset = now + 1000; |
| 376 | } |
| 377 | # endif |
| 378 | } |
| 379 | #endif |
| 380 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 381 | int board_early_init_r(void) |
| 382 | { |
| 383 | u32 val; |
| 384 | |
Siva Durga Prasad Paladugu | 64d9000 | 2017-12-07 15:05:30 +0530 | [diff] [blame] | 385 | if (current_el() != 3) |
| 386 | return 0; |
| 387 | |
Michal Simek | 245d528 | 2017-07-12 10:32:18 +0200 | [diff] [blame] | 388 | val = readl(&crlapb_base->timestamp_ref_ctrl); |
| 389 | val &= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; |
| 390 | |
Siva Durga Prasad Paladugu | 64d9000 | 2017-12-07 15:05:30 +0530 | [diff] [blame] | 391 | if (!val) { |
Michal Simek | c23d3f8 | 2015-11-05 08:34:35 +0100 | [diff] [blame] | 392 | val = readl(&crlapb_base->timestamp_ref_ctrl); |
| 393 | val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; |
| 394 | writel(val, &crlapb_base->timestamp_ref_ctrl); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 395 | |
Michal Simek | c23d3f8 | 2015-11-05 08:34:35 +0100 | [diff] [blame] | 396 | /* Program freq register in System counter */ |
| 397 | writel(zynqmp_get_system_timer_freq(), |
| 398 | &iou_scntr_secure->base_frequency_id_register); |
| 399 | /* And enable system counter */ |
| 400 | writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN, |
| 401 | &iou_scntr_secure->counter_control_register); |
| 402 | } |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 403 | return 0; |
| 404 | } |
| 405 | |
Nitin Jain | b2eb59b | 2018-02-16 12:56:17 +0530 | [diff] [blame] | 406 | unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, |
| 407 | char * const argv[]) |
| 408 | { |
| 409 | int ret = 0; |
| 410 | |
| 411 | if (current_el() > 1) { |
| 412 | smp_kick_all_cpus(); |
| 413 | dcache_disable(); |
| 414 | armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry, |
| 415 | ES_TO_AARCH64); |
| 416 | } else { |
| 417 | printf("FAIL: current EL is not above EL1\n"); |
| 418 | ret = EINVAL; |
| 419 | } |
| 420 | return ret; |
| 421 | } |
| 422 | |
Michal Simek | 8faa66a | 2016-02-08 09:34:53 +0100 | [diff] [blame] | 423 | #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE) |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 424 | int dram_init_banksize(void) |
Michal Simek | 8faa66a | 2016-02-08 09:34:53 +0100 | [diff] [blame] | 425 | { |
Nitin Jain | 9bcc76f | 2018-04-20 12:30:40 +0530 | [diff] [blame] | 426 | int ret; |
| 427 | |
| 428 | ret = fdtdec_setup_memory_banksize(); |
| 429 | if (ret) |
| 430 | return ret; |
| 431 | |
| 432 | mem_map_fill(); |
| 433 | |
| 434 | return 0; |
Tom Rini | edcfdbd | 2016-12-09 07:56:54 -0500 | [diff] [blame] | 435 | } |
Michal Simek | 8faa66a | 2016-02-08 09:34:53 +0100 | [diff] [blame] | 436 | |
Tom Rini | edcfdbd | 2016-12-09 07:56:54 -0500 | [diff] [blame] | 437 | int dram_init(void) |
| 438 | { |
Siva Durga Prasad Paladugu | b3d55ea | 2018-07-16 15:56:11 +0530 | [diff] [blame] | 439 | if (fdtdec_setup_mem_size_base() != 0) |
Nathan Rossi | ac04bfa | 2016-12-19 00:03:34 +1000 | [diff] [blame] | 440 | return -EINVAL; |
Tom Rini | edcfdbd | 2016-12-09 07:56:54 -0500 | [diff] [blame] | 441 | |
| 442 | return 0; |
Michal Simek | 8faa66a | 2016-02-08 09:34:53 +0100 | [diff] [blame] | 443 | } |
| 444 | #else |
Nitin Jain | 9bcc76f | 2018-04-20 12:30:40 +0530 | [diff] [blame] | 445 | int dram_init_banksize(void) |
| 446 | { |
| 447 | #if defined(CONFIG_NR_DRAM_BANKS) |
| 448 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
| 449 | gd->bd->bi_dram[0].size = get_effective_memsize(); |
| 450 | #endif |
| 451 | |
| 452 | mem_map_fill(); |
| 453 | |
| 454 | return 0; |
| 455 | } |
| 456 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 457 | int dram_init(void) |
| 458 | { |
Michal Simek | 1b84621 | 2018-04-11 16:12:28 +0200 | [diff] [blame] | 459 | gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
| 460 | CONFIG_SYS_SDRAM_SIZE); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 461 | |
| 462 | return 0; |
| 463 | } |
Michal Simek | 8faa66a | 2016-02-08 09:34:53 +0100 | [diff] [blame] | 464 | #endif |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 465 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 466 | void reset_cpu(ulong addr) |
| 467 | { |
| 468 | } |
| 469 | |
Michal Simek | 342edfe | 2018-12-20 09:33:38 +0100 | [diff] [blame] | 470 | #if defined(CONFIG_BOARD_LATE_INIT) |
Michal Simek | 29b9b71 | 2018-05-17 14:06:06 +0200 | [diff] [blame] | 471 | static const struct { |
| 472 | u32 bit; |
| 473 | const char *name; |
| 474 | } reset_reasons[] = { |
| 475 | { RESET_REASON_DEBUG_SYS, "DEBUG" }, |
| 476 | { RESET_REASON_SOFT, "SOFT" }, |
| 477 | { RESET_REASON_SRST, "SRST" }, |
| 478 | { RESET_REASON_PSONLY, "PS-ONLY" }, |
| 479 | { RESET_REASON_PMU, "PMU" }, |
| 480 | { RESET_REASON_INTERNAL, "INTERNAL" }, |
| 481 | { RESET_REASON_EXTERNAL, "EXTERNAL" }, |
| 482 | {} |
| 483 | }; |
| 484 | |
| 485 | static u32 reset_reason(void) |
| 486 | { |
| 487 | u32 ret; |
| 488 | int i; |
| 489 | const char *reason = NULL; |
| 490 | |
| 491 | ret = readl(&crlapb_base->reset_reason); |
| 492 | |
| 493 | puts("Reset reason:\t"); |
| 494 | |
| 495 | for (i = 0; i < ARRAY_SIZE(reset_reasons); i++) { |
| 496 | if (ret & reset_reasons[i].bit) { |
| 497 | reason = reset_reasons[i].name; |
| 498 | printf("%s ", reset_reasons[i].name); |
| 499 | break; |
| 500 | } |
| 501 | } |
| 502 | |
| 503 | puts("\n"); |
| 504 | |
| 505 | env_set("reset_reason", reason); |
| 506 | |
| 507 | writel(~0, &crlapb_base->reset_reason); |
| 508 | |
| 509 | return ret; |
| 510 | } |
| 511 | |
Michal Simek | 1ca66d7 | 2019-02-14 13:14:30 +0100 | [diff] [blame] | 512 | static int set_fdtfile(void) |
| 513 | { |
| 514 | char *compatible, *fdtfile; |
| 515 | const char *suffix = ".dtb"; |
| 516 | const char *vendor = "xilinx/"; |
| 517 | |
| 518 | if (env_get("fdtfile")) |
| 519 | return 0; |
| 520 | |
| 521 | compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", NULL); |
| 522 | if (compatible) { |
| 523 | debug("Compatible: %s\n", compatible); |
| 524 | |
| 525 | /* Discard vendor prefix */ |
| 526 | strsep(&compatible, ","); |
| 527 | |
| 528 | fdtfile = calloc(1, strlen(vendor) + strlen(compatible) + |
| 529 | strlen(suffix) + 1); |
| 530 | if (!fdtfile) |
| 531 | return -ENOMEM; |
| 532 | |
| 533 | sprintf(fdtfile, "%s%s%s", vendor, compatible, suffix); |
| 534 | |
| 535 | env_set("fdtfile", fdtfile); |
| 536 | free(fdtfile); |
| 537 | } |
| 538 | |
| 539 | return 0; |
| 540 | } |
| 541 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 542 | int board_late_init(void) |
| 543 | { |
| 544 | u32 reg = 0; |
| 545 | u8 bootmode; |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 546 | struct udevice *dev; |
| 547 | int bootseq = -1; |
| 548 | int bootseq_len = 0; |
Michal Simek | 7410b14 | 2018-04-25 11:10:34 +0200 | [diff] [blame] | 549 | int env_targets_len = 0; |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 550 | const char *mode; |
| 551 | char *new_targets; |
Siva Durga Prasad Paladugu | 245c556 | 2017-12-20 16:35:06 +0530 | [diff] [blame] | 552 | char *env_targets; |
Siva Durga Prasad Paladugu | e6fd3bb | 2017-02-21 17:58:28 +0530 | [diff] [blame] | 553 | int ret; |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 554 | |
Michal Simek | 482f549 | 2018-10-05 08:55:16 +0200 | [diff] [blame] | 555 | #if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD) |
| 556 | usb_ether_init(); |
| 557 | #endif |
| 558 | |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 559 | if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { |
| 560 | debug("Saved variables - Skipping\n"); |
| 561 | return 0; |
| 562 | } |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 563 | |
Michal Simek | 1ca66d7 | 2019-02-14 13:14:30 +0100 | [diff] [blame] | 564 | ret = set_fdtfile(); |
| 565 | if (ret) |
| 566 | return ret; |
| 567 | |
Siva Durga Prasad Paladugu | e6fd3bb | 2017-02-21 17:58:28 +0530 | [diff] [blame] | 568 | ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, ®); |
| 569 | if (ret) |
| 570 | return -EINVAL; |
| 571 | |
Michal Simek | 833e0c4 | 2016-10-25 11:43:02 +0200 | [diff] [blame] | 572 | if (reg >> BOOT_MODE_ALT_SHIFT) |
| 573 | reg >>= BOOT_MODE_ALT_SHIFT; |
| 574 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 575 | bootmode = reg & BOOT_MODES_MASK; |
| 576 | |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 577 | puts("Bootmode: "); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 578 | switch (bootmode) { |
Michal Simek | 12398ea | 2016-08-19 14:14:52 +0200 | [diff] [blame] | 579 | case USB_MODE: |
| 580 | puts("USB_MODE\n"); |
| 581 | mode = "usb"; |
Michal Simek | 4338035 | 2017-12-01 15:18:24 +0100 | [diff] [blame] | 582 | env_set("modeboot", "usb_dfu_spl"); |
Michal Simek | 12398ea | 2016-08-19 14:14:52 +0200 | [diff] [blame] | 583 | break; |
Siva Durga Prasad Paladugu | 30f0fc7 | 2015-03-13 11:10:26 +0530 | [diff] [blame] | 584 | case JTAG_MODE: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 585 | puts("JTAG_MODE\n"); |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 586 | mode = "pxe dhcp"; |
Michal Simek | 4338035 | 2017-12-01 15:18:24 +0100 | [diff] [blame] | 587 | env_set("modeboot", "jtagboot"); |
Siva Durga Prasad Paladugu | 30f0fc7 | 2015-03-13 11:10:26 +0530 | [diff] [blame] | 588 | break; |
| 589 | case QSPI_MODE_24BIT: |
| 590 | case QSPI_MODE_32BIT: |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 591 | mode = "qspi0"; |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 592 | puts("QSPI_MODE\n"); |
Michal Simek | 4338035 | 2017-12-01 15:18:24 +0100 | [diff] [blame] | 593 | env_set("modeboot", "qspiboot"); |
Siva Durga Prasad Paladugu | 30f0fc7 | 2015-03-13 11:10:26 +0530 | [diff] [blame] | 594 | break; |
Michal Simek | 02d66cd | 2015-04-15 15:02:28 +0200 | [diff] [blame] | 595 | case EMMC_MODE: |
Michal Simek | df7ff0a | 2015-10-05 15:59:38 +0200 | [diff] [blame] | 596 | puts("EMMC_MODE\n"); |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 597 | mode = "mmc0"; |
Michal Simek | 4338035 | 2017-12-01 15:18:24 +0100 | [diff] [blame] | 598 | env_set("modeboot", "emmcboot"); |
Michal Simek | df7ff0a | 2015-10-05 15:59:38 +0200 | [diff] [blame] | 599 | break; |
| 600 | case SD_MODE: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 601 | puts("SD_MODE\n"); |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 602 | if (uclass_get_device_by_name(UCLASS_MMC, |
Siva Durga Prasad Paladugu | e91778d | 2019-01-03 15:44:24 +0530 | [diff] [blame] | 603 | "mmc@ff160000", &dev) && |
| 604 | uclass_get_device_by_name(UCLASS_MMC, |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 605 | "sdhci@ff160000", &dev)) { |
| 606 | puts("Boot from SD0 but without SD0 enabled!\n"); |
| 607 | return -1; |
| 608 | } |
| 609 | debug("mmc0 device found at %p, seq %d\n", dev, dev->seq); |
| 610 | |
| 611 | mode = "mmc"; |
| 612 | bootseq = dev->seq; |
Michal Simek | 4338035 | 2017-12-01 15:18:24 +0100 | [diff] [blame] | 613 | env_set("modeboot", "sdboot"); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 614 | break; |
Siva Durga Prasad Paladugu | 29a77d2 | 2016-09-21 11:45:05 +0530 | [diff] [blame] | 615 | case SD1_LSHFT_MODE: |
| 616 | puts("LVL_SHFT_"); |
| 617 | /* fall through */ |
Michal Simek | 108e184 | 2015-10-05 10:51:12 +0200 | [diff] [blame] | 618 | case SD_MODE1: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 619 | puts("SD_MODE1\n"); |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 620 | if (uclass_get_device_by_name(UCLASS_MMC, |
Siva Durga Prasad Paladugu | e91778d | 2019-01-03 15:44:24 +0530 | [diff] [blame] | 621 | "mmc@ff170000", &dev) && |
| 622 | uclass_get_device_by_name(UCLASS_MMC, |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 623 | "sdhci@ff170000", &dev)) { |
| 624 | puts("Boot from SD1 but without SD1 enabled!\n"); |
| 625 | return -1; |
| 626 | } |
| 627 | debug("mmc1 device found at %p, seq %d\n", dev, dev->seq); |
| 628 | |
| 629 | mode = "mmc"; |
| 630 | bootseq = dev->seq; |
Michal Simek | 4338035 | 2017-12-01 15:18:24 +0100 | [diff] [blame] | 631 | env_set("modeboot", "sdboot"); |
Michal Simek | 108e184 | 2015-10-05 10:51:12 +0200 | [diff] [blame] | 632 | break; |
| 633 | case NAND_MODE: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 634 | puts("NAND_MODE\n"); |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 635 | mode = "nand0"; |
Michal Simek | 4338035 | 2017-12-01 15:18:24 +0100 | [diff] [blame] | 636 | env_set("modeboot", "nandboot"); |
Michal Simek | 108e184 | 2015-10-05 10:51:12 +0200 | [diff] [blame] | 637 | break; |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 638 | default: |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 639 | mode = ""; |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 640 | printf("Invalid Boot Mode:0x%x\n", bootmode); |
| 641 | break; |
| 642 | } |
| 643 | |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 644 | if (bootseq >= 0) { |
| 645 | bootseq_len = snprintf(NULL, 0, "%i", bootseq); |
| 646 | debug("Bootseq len: %x\n", bootseq_len); |
| 647 | } |
| 648 | |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 649 | /* |
| 650 | * One terminating char + one byte for space between mode |
| 651 | * and default boot_targets |
| 652 | */ |
Siva Durga Prasad Paladugu | 245c556 | 2017-12-20 16:35:06 +0530 | [diff] [blame] | 653 | env_targets = env_get("boot_targets"); |
Michal Simek | 7410b14 | 2018-04-25 11:10:34 +0200 | [diff] [blame] | 654 | if (env_targets) |
| 655 | env_targets_len = strlen(env_targets); |
| 656 | |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 657 | new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + |
| 658 | bootseq_len); |
Michal Simek | 089b84d | 2018-06-13 09:42:41 +0200 | [diff] [blame] | 659 | if (!new_targets) |
| 660 | return -ENOMEM; |
Michal Simek | 7410b14 | 2018-04-25 11:10:34 +0200 | [diff] [blame] | 661 | |
Michal Simek | f183a98 | 2018-04-25 11:20:43 +0200 | [diff] [blame] | 662 | if (bootseq >= 0) |
| 663 | sprintf(new_targets, "%s%x %s", mode, bootseq, |
| 664 | env_targets ? env_targets : ""); |
| 665 | else |
| 666 | sprintf(new_targets, "%s %s", mode, |
| 667 | env_targets ? env_targets : ""); |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 668 | |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 669 | env_set("boot_targets", new_targets); |
Michal Simek | ecfb6dc | 2016-04-22 14:28:54 +0200 | [diff] [blame] | 670 | |
Michal Simek | 29b9b71 | 2018-05-17 14:06:06 +0200 | [diff] [blame] | 671 | reset_reason(); |
| 672 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 673 | return 0; |
| 674 | } |
Michal Simek | 342edfe | 2018-12-20 09:33:38 +0100 | [diff] [blame] | 675 | #endif |
Siva Durga Prasad Paladugu | 650e0a3 | 2015-08-04 13:01:05 +0530 | [diff] [blame] | 676 | |
| 677 | int checkboard(void) |
| 678 | { |
Michal Simek | 47ce936 | 2016-01-25 11:04:21 +0100 | [diff] [blame] | 679 | puts("Board: Xilinx ZynqMP\n"); |
Siva Durga Prasad Paladugu | 650e0a3 | 2015-08-04 13:01:05 +0530 | [diff] [blame] | 680 | return 0; |
| 681 | } |