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git01.mediatek.com / filogic / uboot / f2856adf58e0a8365216b08945809f77e0810118 / . / configs / sama5d4_xplained_nandflash_defconfig
blob: 1a481217c774deecdf5718710c78dfbd0929ee7a [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x26f00000
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]4CONFIG_TARGET_SAMA5D4_XPLAINED=y
Simon Glass0bdfc3e2016-09-12 23:18:39 -0600[diff] [blame]5CONFIG_SPL_GPIO_SUPPORT=y
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]8CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]9CONFIG_SPL_SERIAL_SUPPORT=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]10CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]11CONFIG_NR_DRAM_BANKS=1
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]12CONFIG_SPL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]13CONFIG_DEBUG_UART_BOARD_INIT=y
14CONFIG_DEBUG_UART_BASE=0xfc00c000
15CONFIG_DEBUG_UART_CLOCK=100000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]16CONFIG_DEBUG_UART=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]17CONFIG_ENV_VARS_UBOOT_CONFIG=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]18CONFIG_FIT=y
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]19CONFIG_NAND_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]20CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]21CONFIG_USE_BOOTARGS=y
Eugen Hristev68b37ab2018-04-24 12:00:16 +0300[diff] [blame]22CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]23CONFIG_MISC_INIT_R=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]24# CONFIG_DISPLAY_BOARDINFO is not set
Simon Goldschmidtcc4078c2018-09-30 14:31:53 +0200[diff] [blame]25CONFIG_SPL_TEXT_BASE=0x200000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]26CONFIG_SPL_NAND_SUPPORT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]27CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]28CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]29# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]30# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]31CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]32CONFIG_CMD_NAND=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]33CONFIG_CMD_SF=y
34CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]35CONFIG_CMD_DHCP=y
36CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]37CONFIG_CMD_FAT=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]38CONFIG_OF_CONTROL=y
39CONFIG_SPL_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]40CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]41CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]42CONFIG_ENV_IS_IN_NAND=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]43CONFIG_DM=y
44CONFIG_SPL_DM=y
45CONFIG_CLK=y
46CONFIG_SPL_CLK=y
47CONFIG_CLK_AT91=y
48CONFIG_AT91_UTMI=y
49CONFIG_AT91_H32MX=y
50CONFIG_DM_GPIO=y
51CONFIG_AT91_GPIO=y
Wenyou Yang16b26b02017-09-01 16:26:18 +0800[diff] [blame]52CONFIG_DM_I2C=y
53CONFIG_SYS_I2C_AT91=y
54CONFIG_I2C_EEPROM=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]55CONFIG_DM_MMC=y
56CONFIG_GENERIC_ATMEL_MCI=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]57CONFIG_NAND_ATMEL=y
Derald D. Woods7830fc52018-12-15 01:36:46 -0600[diff] [blame]58CONFIG_PMECC_CAP=8
59CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]60CONFIG_DM_SPI_FLASH=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]61CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]62CONFIG_SF_DEFAULT_SPEED=30000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]63CONFIG_SPI_FLASH_ATMEL=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]64CONFIG_DM_ETH=y
65CONFIG_MACB=y
66CONFIG_PINCTRL=y
67CONFIG_SPL_PINCTRL=y
68CONFIG_PINCTRL_AT91=y
69CONFIG_DM_SERIAL=y
Wenyou Yang4d8b3212017-04-13 10:31:18 +0800[diff] [blame]70CONFIG_DEBUG_UART_ATMEL=y
Wenyou Yang4d8b3212017-04-13 10:31:18 +0800[diff] [blame]71CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]72CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]73CONFIG_SPI=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]74CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]75CONFIG_TIMER=y
76CONFIG_SPL_TIMER=y
77CONFIG_ATMEL_PIT_TIMER=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]78CONFIG_USB=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]79CONFIG_DM_USB=y
80CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]81CONFIG_USB_STORAGE=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]82CONFIG_USB_GADGET=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]83CONFIG_USB_GADGET_ATMEL_USBA=y
Wenyou Yang426691e2017-09-18 15:26:00 +0800[diff] [blame]84CONFIG_DM_VIDEO=y
85CONFIG_ATMEL_HLCD=y
Eugen Hristev4b407012018-09-18 10:35:41 +0300[diff] [blame]86CONFIG_W1=y
87CONFIG_W1_GPIO=y
88CONFIG_W1_EEPROM=y
89CONFIG_W1_EEPROM_DS24XXX=y
Eugen Hristev4e4426e2018-09-18 10:35:52 +0300[diff] [blame]90CONFIG_OF_LIBFDT_OVERLAY=y