| Oliver Gaskell | 283be08 | 2024-09-12 16:50:51 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0+) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/adi,sc5xx-clocks.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Clock Tree Drivers for Analog Devices SC5XX Processors |
| 8 | |
| 9 | maintainers: |
| 10 | - Vasileios Bimpikas <vasileios.bimpikas@analog.com> |
| 11 | - Utsav Agarwal <utsav.agarwal@analog.com> |
| 12 | - Arturs Artamonovs <arturs.artamonovs@analog.com> |
| 13 | |
| 14 | description: | |
| 15 | These drivers read in the processors CDU (clock distribution unit) |
| 16 | and CGU (clock generation unit) values to determine various clock |
| 17 | rates |
| 18 | |
| 19 | properties: |
| 20 | compatible: |
| 21 | enum: |
| 22 | - adi,sc5xx-clocks # Any |
| 23 | - adi,sc57x-clocks # 32-Bit SC573 processor |
| 24 | - adi,sc58x-clocks # 32-Bit SC584, SC589 processors |
| 25 | - adi,sc594-clocks # 32-Bit SC594 processor |
| 26 | - adi,sc598-clocks # 64-Bit SC598 processor |
| 27 | |
| 28 | '#clock-cells': |
| 29 | const: 1 |
| 30 | |
| 31 | reg: |
| 32 | minItems: 3 |
| 33 | maxItems: 4 |
| 34 | |
| 35 | reg-names: |
| 36 | description: |
| 37 | String reference names for the reg property |
| 38 | minItems: 3 |
| 39 | maxItems: 4 |
| 40 | |
| 41 | clocks: |
| 42 | description: |
| 43 | Specifies the CLKIN0 and CLKIN1 reference clock(s) from which the |
| 44 | output frequencies are derived via CDU+CGU |
| 45 | minItems: 2 |
| 46 | maxItems: 2 |
| 47 | |
| 48 | clock-names: |
| 49 | description: |
| 50 | String reference names for CLKIN0 and CLKIN1 |
| 51 | minItems: 2 |
| 52 | maxItems: 2 |
| 53 | |
| 54 | required: |
| 55 | - compatible |
| 56 | - reg |
| 57 | - clocks |
| 58 | - '#clock-cells' |
| 59 | - clock-names |
| 60 | |
| 61 | additionalProperties: false |
| 62 | |
| 63 | examples: |
| 64 | - | |
| 65 | clk0: clocks@3108d000 { |
| 66 | compatible = "adi,sc57x-clocks"; |
| 67 | reg = <0x3108d000 0x1000>, |
| 68 | <0x3108e000 0x1000>, |
| 69 | <0x3108f000 0x1000>; |
| 70 | #clock-cells = <1>; |
| 71 | clocks = <&sys_clkin0>, <&sys_clkin1>; |
| 72 | clock-names = "sys_clkin0", "sys_clkin1"; |
| 73 | status = "okay"; |
| 74 | }; |
| 75 | |
| 76 | - | |
| 77 | clk1: clocks@3108d000 { |
| 78 | compatible = "adi,sc58x-clocks"; |
| 79 | reg = <0x3108d000 0x1000>, |
| 80 | <0x3108e000 0x1000>, |
| 81 | <0x3108f000 0x1000>; |
| 82 | #clock-cells = <1>; |
| 83 | clocks = <&sys_clkin0>, <&sys_clkin1>; |
| 84 | clock-names = "sys_clkin0", "sys_clkin1"; |
| 85 | status = "okay"; |
| 86 | }; |
| 87 | |
| 88 | - | |
| 89 | clk2: clocks@3108d000 { |
| 90 | compatible = "adi,sc594-clocks"; |
| 91 | reg = <0x3108d000 0x1000>, |
| 92 | <0x3108e000 0x1000>, |
| 93 | <0x3108f000 0x1000>; |
| 94 | #clock-cells = <1>; |
| 95 | clocks = <&sys_clkin0>, <&sys_clkin1>; |
| 96 | clock-names = "sys_clkin0", "sys_clkin1"; |
| 97 | status = "okay"; |
| 98 | }; |
| 99 | |
| 100 | - | |
| 101 | clk3: clocks@3108d000 { |
| 102 | compatible = "adi,sc598-clocks"; |
| 103 | reg = <0x3108d000 0x1000>, |
| 104 | <0x3108e000 0x1000>, |
| 105 | <0x3108f000 0x1000>, |
| 106 | <0x310a9000 0x1000>; |
| 107 | #clock-cells = <1>; |
| 108 | clocks = <&sys_clkin0>, <&sys_clkin1>; |
| 109 | clock-names = "sys_clkin0", "sys_clkin1"; |
| 110 | status = "okay"; |
| 111 | }; |
| 112 | |