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wdenkb02744a2003-04-05 00:53:31 +00001/* The dpalloc function used and implemented in this file was derieved
2 * from PPCBoot/U-Boot file "cpu/mpc8260/commproc.c".
3 */
4
5/* Author: Arun Dharankar <ADharankar@ATTBI.Com>
6 * This example is meant to only demonstrate how the IDMA could be used.
7 */
8
9/*
10 * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's
11 * copyright notice:
12 *
13 * General Purpose functions for the global management of the
14 * 8260 Communication Processor Module.
15 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
16 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
17 * 2.3.99 Updates
18 *
19 * In addition to the individual control of the communication
20 * channels, there are a few functions that globally affect the
21 * communication processor.
22 *
23 * Buffer descriptors must be allocated from the dual ported memory
24 * space. The allocator for that is here. When the communication
25 * process is reset, we reclaim the memory available. There is
26 * currently no deallocator for this memory.
27 */
28
29
wdenkb02744a2003-04-05 00:53:31 +000030#include <common.h>
wdenk874ac262003-07-24 23:38:38 +000031#include <exports.h>
wdenkb02744a2003-04-05 00:53:31 +000032
33#define STANDALONE
34
35#ifndef STANDALONE /* Linked into/Part of PPCBoot */
36#include <command.h>
37#include <watchdog.h>
38#else /* Standalone app of PPCBoot */
wdenkb02744a2003-04-05 00:53:31 +000039#define WATCHDOG_RESET() { \
40 *(ushort *)(CFG_IMMR + 0x1000E) = 0x556c; \
41 *(ushort *)(CFG_IMMR + 0x1000E) = 0xaa39; \
42 }
43#endif /* STANDALONE */
44
45static int debug = 1;
46
47#define DEBUG(fmt, args...) { \
48 if(debug != 0) { \
49 printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__); \
50 printf(fmt, ##args); \
51 } \
52}
53
54#define CPM_CR_IDMA1_SBLOCK (0x14)
55#define CPM_CR_IDMA2_SBLOCK (0x15)
56#define CPM_CR_IDMA3_SBLOCK (0x16)
57#define CPM_CR_IDMA4_SBLOCK (0x17)
58#define CPM_CR_IDMA1_PAGE (0x07)
59#define CPM_CR_IDMA2_PAGE (0x08)
60#define CPM_CR_IDMA3_PAGE (0x09)
61#define CPM_CR_IDMA4_PAGE (0x0a)
62#define PROFF_IDMA1_BASE ((uint)0x87fe)
63#define PROFF_IDMA2_BASE ((uint)0x88fe)
64#define PROFF_IDMA3_BASE ((uint)0x89fe)
65#define PROFF_IDMA4_BASE ((uint)0x8afe)
66
67#define CPM_CR_INIT_TRX ((ushort)0x0000)
68#define CPM_CR_FLG ((ushort)0x0001)
69
70#define mk_cr_cmd(PG, SBC, MCN, OP) \
71 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
72
73
74#pragma pack(1)
75typedef struct ibdbits {
76 unsigned b_valid:1;
77 unsigned b_resv1:1;
78 unsigned b_wrap:1;
79 unsigned b_interrupt:1;
80 unsigned b_last:1;
81 unsigned b_resv2:1;
82 unsigned b_cm:1;
83 unsigned b_resv3:2;
84 unsigned b_sdn:1;
85 unsigned b_ddn:1;
86 unsigned b_dgbl:1;
87 unsigned b_dbo:2;
88 unsigned b_resv4:1;
89 unsigned b_ddtb:1;
90 unsigned b_resv5:2;
91 unsigned b_sgbl:1;
92 unsigned b_sbo:2;
93 unsigned b_resv6:1;
94 unsigned b_sdtb:1;
95 unsigned b_resv7:9;
96} ibdbits_t;
97
98#pragma pack(1)
99typedef union ibdbitsu {
100 ibdbits_t b;
101 uint i;
102} ibdbitsu_t;
103
104#pragma pack(1)
105typedef struct idma_buf_desc {
106 ibdbitsu_t ibd_bits; /* Status and Control */
107 uint ibd_datlen; /* Data length in buffer */
108 uint ibd_sbuf; /* Source buffer addr in host mem */
109 uint ibd_dbuf; /* Destination buffer addr in host mem */
110} ibd_t;
111
112
113#pragma pack(1)
114typedef struct dcmbits {
115 unsigned b_fb:1;
116 unsigned b_lp:1;
117 unsigned b_resv1:3;
118 unsigned b_tc2:1;
119 unsigned b_resv2:1;
120 unsigned b_wrap:3;
121 unsigned b_sinc:1;
122 unsigned b_dinc:1;
123 unsigned b_erm:1;
124 unsigned b_dt:1;
125 unsigned b_sd:2;
126} dcmbits_t;
127
128#pragma pack(1)
129typedef union dcmbitsu {
130 dcmbits_t b;
131 ushort i;
132} dcmbitsu_t;
133
134#pragma pack(1)
135typedef struct pram_idma {
136 ushort pi_ibase;
137 dcmbitsu_t pi_dcmbits;
138 ushort pi_ibdptr;
139 ushort pi_dprbuf;
140 ushort pi_bufinv; /* internal to CPM */
141 ushort pi_ssmax;
142 ushort pi_dprinptr; /* internal to CPM */
143 ushort pi_sts;
144 ushort pi_dproutptr; /* internal to CPM */
145 ushort pi_seob;
146 ushort pi_deob;
147 ushort pi_dts;
148 ushort pi_retadd;
149 ushort pi_resv1; /* internal to CPM */
150 uint pi_bdcnt;
151 uint pi_sptr;
152 uint pi_dptr;
153 uint pi_istate;
154} pram_idma_t;
155
156
157volatile immap_t *immap = (immap_t *) CFG_IMMR;
158volatile ibd_t *bdf;
159volatile pram_idma_t *piptr;
160
161volatile int dmadone;
162volatile int *dmadonep = &dmadone;
163void dmadone_handler (void *);
164
165int idma_init (void);
166void idma_start (int, int, int, uint, uint, int);
167uint dpalloc (uint, uint);
168
169
170uint dpinit_done = 0;
171
172
173#ifdef STANDALONE
174int ctrlc (void)
175{
wdenk874ac262003-07-24 23:38:38 +0000176 if (tstc()) {
177 switch (getc ()) {
wdenkb02744a2003-04-05 00:53:31 +0000178 case 0x03: /* ^C - Control C */
179 return 1;
180 default:
181 break;
182 }
183 }
184 return 0;
185}
186void * memset(void * s,int c,size_t count)
187{
188 char *xs = (char *) s;
189 while (count--)
190 *xs++ = c;
191 return s;
192}
193int memcmp(const void * cs,const void * ct,size_t count)
194{
195 const unsigned char *su1, *su2;
196 int res = 0;
197 for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
198 if ((res = *su1 - *su2) != 0)
199 break;
200 return res;
201}
202#endif /* STANDALONE */
203
204#ifdef STANDALONE
wdenk874ac262003-07-24 23:38:38 +0000205int mem_to_mem_idma2intr (int argc, char *argv[])
wdenkb02744a2003-04-05 00:53:31 +0000206#else
207int do_idma (bd_t * bd, int argc, char *argv[])
208#endif /* STANDALONE */
209{
210 int i;
211
wdenk874ac262003-07-24 23:38:38 +0000212 app_startup(argv);
wdenkb02744a2003-04-05 00:53:31 +0000213 dpinit_done = 0;
214
215 idma_init ();
216
217 DEBUG ("Installing dma handler\n");
wdenk874ac262003-07-24 23:38:38 +0000218 install_hdlr (7, dmadone_handler, (void *) bdf);
wdenkb02744a2003-04-05 00:53:31 +0000219
220 memset ((void *) 0x100000, 'a', 512);
221 memset ((void *) 0x200000, 'b', 512);
222
223 for (i = 0; i < 32; i++) {
224 printf ("Startin IDMA, iteration=%d\n", i);
225 idma_start (1, 1, 512, 0x100000, 0x200000, 3);
226 }
227
228 DEBUG ("Uninstalling dma handler\n");
wdenk874ac262003-07-24 23:38:38 +0000229 free_hdlr (7);
wdenkb02744a2003-04-05 00:53:31 +0000230
231 return 0;
232}
233
234void
235idma_start (int sinc, int dinc, int sz, uint sbuf, uint dbuf, int ttype)
236{
237 /* ttype is for M-M, M-P, P-M or P-P: not used for now */
238
239 piptr->pi_istate = 0; /* manual says: clear it before every START_IDMA */
240 piptr->pi_dcmbits.b.b_resv1 = 0;
241
242 if (sinc == 1)
243 piptr->pi_dcmbits.b.b_sinc = 1;
244 else
245 piptr->pi_dcmbits.b.b_sinc = 0;
246
247 if (dinc == 1)
248 piptr->pi_dcmbits.b.b_dinc = 1;
249 else
250 piptr->pi_dcmbits.b.b_dinc = 0;
251
252 piptr->pi_dcmbits.b.b_erm = 0;
253 piptr->pi_dcmbits.b.b_sd = 0x00; /* M-M */
254
255 bdf->ibd_sbuf = sbuf;
256 bdf->ibd_dbuf = dbuf;
257 bdf->ibd_bits.b.b_cm = 0;
258 bdf->ibd_bits.b.b_interrupt = 1;
259 bdf->ibd_bits.b.b_wrap = 1;
260 bdf->ibd_bits.b.b_last = 1;
261 bdf->ibd_bits.b.b_sdn = 0;
262 bdf->ibd_bits.b.b_ddn = 0;
263 bdf->ibd_bits.b.b_dgbl = 0;
264 bdf->ibd_bits.b.b_ddtb = 0;
265 bdf->ibd_bits.b.b_sgbl = 0;
266 bdf->ibd_bits.b.b_sdtb = 0;
267 bdf->ibd_bits.b.b_dbo = 1;
268 bdf->ibd_bits.b.b_sbo = 1;
269 bdf->ibd_bits.b.b_valid = 1;
270 bdf->ibd_datlen = 512;
271
272 *dmadonep = 0;
273
274 immap->im_sdma.sdma_idmr2 = (uchar) 0xf;
275
276 immap->im_cpm.cp_cpcr = mk_cr_cmd (CPM_CR_IDMA2_PAGE,
277 CPM_CR_IDMA2_SBLOCK, 0x0,
278 0x9) | 0x00010000;
279
280 while (*dmadonep != 1) {
281 if (ctrlc ()) {
282 DEBUG ("\nInterrupted waiting for DMA interrupt.\n");
283 goto done;
284 }
285 printf ("Waiting for DMA interrupt (dmadone=%d b_valid = %d)...\n",
286 dmadone, bdf->ibd_bits.b.b_valid);
287 udelay (1000000);
288 }
289 printf ("DMA complete notification received!\n");
290
291 done:
292 DEBUG ("memcmp(0x%08x, 0x%08x, 512) = %d\n",
293 sbuf, dbuf, memcmp ((void *) sbuf, (void *) dbuf, 512));
294
295 return;
296}
297
298#define MAX_INT_BUFSZ 64
299#define DCM_WRAP 0 /* MUST be consistant with MAX_INT_BUFSZ */
300
301int idma_init (void)
302{
303 uint memaddr;
304
305 immap->im_cpm.cp_rccr &= ~0x00F3FFFF;
306 immap->im_cpm.cp_rccr |= 0x00A00A00;
307
308 memaddr = dpalloc (sizeof (pram_idma_t), 64);
309
310 *(volatile ushort *) &immap->im_dprambase[PROFF_IDMA2_BASE] = memaddr;
311 piptr = (volatile pram_idma_t *) ((uint) (immap) + memaddr);
312
313 piptr->pi_resv1 = 0; /* manual says: clear it */
314 piptr->pi_dcmbits.b.b_fb = 0;
315 piptr->pi_dcmbits.b.b_lp = 1;
316 piptr->pi_dcmbits.b.b_erm = 0;
317 piptr->pi_dcmbits.b.b_dt = 0;
318
319 memaddr = (uint) dpalloc (sizeof (ibd_t), 64);
320 piptr->pi_ibase = piptr->pi_ibdptr = (volatile short) memaddr;
321 bdf = (volatile ibd_t *) ((uint) (immap) + memaddr);
322 bdf->ibd_bits.b.b_valid = 0;
323
324 memaddr = (uint) dpalloc (64, 64);
325 piptr->pi_dprbuf = (volatile ushort) memaddr;
326 piptr->pi_dcmbits.b.b_wrap = 4;
327 piptr->pi_ssmax = 32;
328
329 piptr->pi_sts = piptr->pi_ssmax;
330 piptr->pi_dts = piptr->pi_ssmax;
331
332 return 1;
333}
334
335void dmadone_handler (void *arg)
336{
337 immap->im_sdma.sdma_idmr2 = (uchar) 0x0;
338
339 *dmadonep = 1;
340
341 return;
342}
343
344
345static uint dpbase = 0;
346
347uint dpalloc (uint size, uint align)
348{
349 DECLARE_GLOBAL_DATA_PTR;
350
351 volatile immap_t *immr = (immap_t *) CFG_IMMR;
352 uint retloc;
353 uint align_mask, off;
354 uint savebase;
355
356 /* Pointer to initial global data area */
357
358 if (dpinit_done == 0) {
359 dpbase = gd->dp_alloc_base;
360 dpinit_done = 1;
361 }
362
363 align_mask = align - 1;
364 savebase = dpbase;
365
366 if ((off = (dpbase & align_mask)) != 0)
367 dpbase += (align - off);
368
369 if ((off = size & align_mask) != 0)
370 size += align - off;
371
372 if ((dpbase + size) >= gd->dp_alloc_top) {
373 dpbase = savebase;
374 printf ("dpalloc: ran out of dual port ram!");
375 return 0;
376 }
377
378 retloc = dpbase;
379 dpbase += size;
380
381 memset ((void *) &immr->im_dprambase[retloc], 0, size);
382
383 return (retloc);
384}