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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Pali Rohár248ef0a2012-10-29 07:54:01 +00002/*
3 * (C) Copyright 2011-2012
Pali Rohár10a953d2020-04-01 00:35:08 +02004 * Pali Rohár <pali@kernel.org>
Pali Rohár248ef0a2012-10-29 07:54:01 +00005 *
6 * (C) Copyright 2010
7 * Alistair Buxton <a.j.buxton@gmail.com>
8 *
9 * Derived from Beagle Board code:
10 * (C) Copyright 2006-2008
11 * Texas Instruments.
12 * Richard Woodruff <r-woodruff2@ti.com>
13 * Syed Mohammed Khasim <x0khasim@ti.com>
14 *
15 * Configuration settings for the Nokia RX-51 aka N900.
Pali Rohár248ef0a2012-10-29 07:54:01 +000016 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21/*
22 * High Level Configuration Options
23 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000024
Pali Rohár248ef0a2012-10-29 07:54:01 +000025#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050026#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000027#include <asm/arch/mem.h>
28#include <linux/stringify.h>
29
Pali Rohár248ef0a2012-10-29 07:54:01 +000030/* Clock Defines */
31#define V_OSCK 26000000 /* Clock output from T2 */
32#define V_SCLK (V_OSCK >> 1)
33
Pali Rohár248ef0a2012-10-29 07:54:01 +000034#define CONFIG_UBI_SIZE (512 << 10)
Pali Rohár248ef0a2012-10-29 07:54:01 +000035
36/*
37 * Hardware drivers
38 */
39
40/*
41 * NS16550 Configuration
42 */
43#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
44
Pali Rohár248ef0a2012-10-29 07:54:01 +000045#define CONFIG_SYS_NS16550_SERIAL
46#define CONFIG_SYS_NS16550_REG_SIZE (-4)
47#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
48
49/*
50 * select serial console configuration
51 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000052#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Pali Rohár248ef0a2012-10-29 07:54:01 +000053
Pali Rohár248ef0a2012-10-29 07:54:01 +000054#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000055
Pali Rohár248ef0a2012-10-29 07:54:01 +000056/* USB device configuration */
57#define CONFIG_USB_DEVICE
Pali Rohárbba0bba2021-02-20 11:50:15 +010058#define CONFIG_USB_TTY
Pali Rohár248ef0a2012-10-29 07:54:01 +000059#define CONFIG_USBD_VENDORID 0x0421
Pali Rohárbba0bba2021-02-20 11:50:15 +010060#define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8
61#define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8
Pali Rohár248ef0a2012-10-29 07:54:01 +000062#define CONFIG_USBD_MANUFACTURER "Nokia"
Pali Rohárbba0bba2021-02-20 11:50:15 +010063#define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)"
Pali Rohár248ef0a2012-10-29 07:54:01 +000064
Pali Rohár248ef0a2012-10-29 07:54:01 +000065#define GPIO_SLIDE 71
66
67/*
68 * Board ONENAND Info.
69 */
70
Pali Rohár248ef0a2012-10-29 07:54:01 +000071#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000072
Pali Rohár248ef0a2012-10-29 07:54:01 +000073/*
74 * Framebuffer
75 */
76/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +000077#define VIDEO_FB_16BPP_PIXEL_SWAP
78#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000079
Pali Rohár248ef0a2012-10-29 07:54:01 +000080/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +000081#define CONFIG_EXTRA_ENV_SETTINGS \
Pali Rohár248ef0a2012-10-29 07:54:01 +000082 "usbtty=cdc_acm\0" \
Pali Rohár54a30142022-02-03 19:38:50 +010083 "stdin=usbtty,serial,keyboard\0" \
Pali Rohárbba0bba2021-02-20 11:50:15 +010084 "stdout=usbtty,serial,vga\0" \
85 "stderr=usbtty,serial,vga\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +000086 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
87 "switchmmc=mmc dev ${mmcnum}\0" \
88 "kernaddr=0x82008000\0" \
89 "initrdaddr=0x84008000\0" \
90 "scriptaddr=0x86008000\0" \
91 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
92 "${loadaddr} ${mmcfile}\0" \
93 "kernload=setenv loadaddr ${kernaddr};" \
94 "setenv mmcfile ${mmckernfile};" \
95 "run fileload\0" \
96 "initrdload=setenv loadaddr ${initrdaddr};" \
97 "setenv mmcfile ${mmcinitrdfile};" \
98 "run fileload\0" \
99 "scriptload=setenv loadaddr ${scriptaddr};" \
100 "setenv mmcfile ${mmcscriptfile};" \
101 "run fileload\0" \
102 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
103 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
104 "kernboot=echo Booting ${mmckernfile} from mmc " \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200105 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} || " \
106 "bootz ${kernaddr}\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000107 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
Pali Rohár0a8825c2021-06-18 15:27:03 +0200108 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr} || " \
109 "bootz ${kernaddr} ${initrdaddr}\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000110 "attachboot=echo Booting attached kernel image ...;" \
111 "setenv setup_omap_atag 1;" \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200112 "bootm ${attkernaddr} || bootz ${attkernaddr};" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000113 "setenv setup_omap_atag\0" \
Pali Rohár5e0f5132021-06-18 15:27:04 +0200114 "trymmcscriptboot=run switchmmc && run scriptload && run scriptboot\0" \
115 "trymmckernboot=run switchmmc && run kernload && run kernboot\0" \
116 "trymmckerninitrdboot=run switchmmc && run initrdload && " \
117 "run kernload && run kerninitrdboot\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000118 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200119 "setenv mmckernfile uImage; run trymmckernboot;" \
120 "setenv mmckernfile zImage; run trymmckernboot\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000121 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
122 "setenv mmcpart 2; run trymmcpartboot;" \
123 "setenv mmcpart 3; run trymmcpartboot;" \
124 "setenv mmcpart 4; run trymmcpartboot\0" \
125 "trymmcboot=if run switchmmc; then " \
126 "setenv mmctype fat;" \
127 "run trymmcallpartboot;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000128 "setenv mmctype ext4;" \
129 "run trymmcallpartboot;" \
130 "fi\0" \
131 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
132 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár5e0f5132021-06-18 15:27:04 +0200133 "trymmcbootmenu=setenv mmctype fat && run trymmcscriptboot || " \
134 "setenv mmctype ext4 && run trymmcscriptboot\0" \
135 "preboot=setenv mmcpart 1; setenv mmcscriptfile bootmenu.scr;" \
136 "setenv mmcnum 0 && run trymmcbootmenu || " \
137 "setenv mmcnum 1 && run trymmcbootmenu;" \
Pali Rohár6f52aee2020-04-01 00:35:11 +0200138 "if run slide; then true; else " \
139 "setenv bootmenu_delay 0;" \
140 "setenv bootdelay 0;" \
141 "fi\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000142 "menucmd=bootmenu\0" \
143 "bootmenu_0=Attached kernel=run attachboot\0" \
144 "bootmenu_1=Internal eMMC=run emmcboot\0" \
145 "bootmenu_2=External SD card=run sdboot\0" \
146 "bootmenu_3=U-Boot boot order=boot\0" \
147 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000148 ""
149
Pali Rohár13eb3e42013-03-07 05:15:19 +0000150#define CONFIG_POSTBOOTMENU \
151 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000152 "echo Extra commands:;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000153 "echo run sdboot - Boot from SD card slot.;" \
154 "echo run emmcboot - Boot internal eMMC memory.;" \
155 "echo run attachboot - Boot attached kernel image.;" \
156 "echo"
157
Pali Rohár248ef0a2012-10-29 07:54:01 +0000158/*
159 * OMAP3 has 12 GP timers, they can be driven by the system clock
160 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
161 * This rate is divided by a local divisor.
162 */
163#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
164#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000165
166/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000167 * Physical Memory Map
168 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000169#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
170
171/*
172 * FLASH and environment organization
173 */
174
Pali Rohár248ef0a2012-10-29 07:54:01 +0000175#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
176#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
177#define CONFIG_SYS_INIT_RAM_SIZE 0x800
178#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
179 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
180
181/*
182 * Attached kernel image
183 */
184
185#define SDRAM_SIZE 0x10000000 /* 256 MB */
186#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
187
188#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
189#define KERNEL_OFFSET 0x40000 /* 256 kB */
190#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
191#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
192
193/* Reserve protected RAM for attached kernel */
194#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
195
196#endif /* __CONFIG_H */