Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2017-2018 NXP |
| 4 | */ |
| 5 | |
| 6 | #ifndef __IMX8QM_ROM7720_H |
| 7 | #define __IMX8QM_ROM7720_H |
| 8 | |
| 9 | #include <linux/sizes.h> |
Simon Glass | fb64e36 | 2020-05-10 11:40:09 -0600 | [diff] [blame] | 10 | #include <linux/stringify.h> |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 11 | #include <asm/arch/imx-regs.h> |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 12 | |
| 13 | #define CONFIG_SPL_MAX_SIZE (124 * 1024) |
| 14 | #define CONFIG_SPL_BSS_START_ADDR 0x00128000 |
| 15 | #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ |
| 16 | |
Oliver Graute | d5c36ec | 2020-02-12 12:01:17 +0000 | [diff] [blame] | 17 | #define CONFIG_SYS_BOOTMAPSZ (256 << 20) |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 18 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
Oliver Graute | 2fe5a34 | 2019-12-19 14:25:53 +0000 | [diff] [blame] | 19 | #define USDHC1_BASE_ADDR 0x5B010000 |
| 20 | #define USDHC2_BASE_ADDR 0x5B020000 |
| 21 | #define USDHC3_BASE_ADDR 0x5B030000 |
| 22 | |
Oliver Graute | 6e0619b | 2022-01-26 22:55:08 +0100 | [diff] [blame] | 23 | #define CONFIG_SYS_BOOTM_LEN SZ_64M |
| 24 | |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 25 | /* FUSE command */ |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 26 | |
| 27 | /* Boot M4 */ |
| 28 | #define M4_BOOT_ENV \ |
| 29 | "m4_0_image=m4_0.bin\0" \ |
| 30 | "m4_1_image=m4_1.bin\0" \ |
| 31 | "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ |
| 32 | "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ |
| 33 | "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ |
| 34 | "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ |
| 35 | |
| 36 | #ifdef CONFIG_NAND_BOOT |
| 37 | #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) " |
| 38 | #else |
| 39 | #define MFG_NAND_PARTITION "" |
| 40 | #endif |
| 41 | |
| 42 | #define CONFIG_MFG_ENV_SETTINGS \ |
| 43 | "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ |
| 44 | "rdinit=/linuxrc " \ |
| 45 | "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ |
| 46 | "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ |
| 47 | "g_mass_storage.iSerialNumber=\"\" "\ |
| 48 | MFG_NAND_PARTITION \ |
| 49 | "clk_ignore_unused "\ |
| 50 | "\0" \ |
| 51 | "initrd_addr=0x83800000\0" \ |
| 52 | "initrd_high=0xffffffffffffffff\0" \ |
| 53 | "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ |
| 54 | |
| 55 | /* Initial environment variables */ |
| 56 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 57 | CONFIG_MFG_ENV_SETTINGS \ |
| 58 | M4_BOOT_ENV \ |
| 59 | "script=boot.scr\0" \ |
| 60 | "image=Image\0" \ |
| 61 | "panel=NULL\0" \ |
| 62 | "console=ttyLP0\0" \ |
Oliver Graute | 88c5a1b | 2022-01-26 22:56:07 +0100 | [diff] [blame] | 63 | "fdt_addr=0x84000000\0" \ |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 64 | "boot_fdt=try\0" \ |
| 65 | "fdt_file=imx8qm-rom7720-a1.dtb\0" \ |
| 66 | "initrd_addr=0x83800000\0" \ |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 67 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
Tom Rini | b113bca | 2021-12-11 14:55:52 -0500 | [diff] [blame] | 68 | "mmcpart=1\0" \ |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 69 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
| 70 | "mmcautodetect=yes\0" \ |
| 71 | "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ |
| 72 | "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
| 73 | "bootscript=echo Running bootscript from mmc ...; " \ |
| 74 | "source\0" \ |
| 75 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| 76 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| 77 | "mmcboot=echo Booting from mmc ...; " \ |
| 78 | "run mmcargs; " \ |
| 79 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| 80 | "if run loadfdt; then " \ |
| 81 | "booti ${loadaddr} - ${fdt_addr}; " \ |
| 82 | "else " \ |
| 83 | "echo WARN: Cannot load the DT; " \ |
| 84 | "fi; " \ |
| 85 | "else " \ |
| 86 | "echo wait for boot; " \ |
| 87 | "fi;\0" \ |
| 88 | "netargs=setenv bootargs console=${console},${baudrate} " \ |
| 89 | "root=/dev/nfs " \ |
| 90 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \ |
| 91 | "netboot=echo Booting from net ...; " \ |
| 92 | "run netargs; " \ |
| 93 | "if test ${ip_dyn} = yes; then " \ |
| 94 | "setenv get_cmd dhcp; " \ |
| 95 | "else " \ |
| 96 | "setenv get_cmd tftp; " \ |
| 97 | "fi; " \ |
| 98 | "${get_cmd} ${loadaddr} ${image}; " \ |
| 99 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| 100 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
| 101 | "booti ${loadaddr} - ${fdt_addr}; " \ |
| 102 | "else " \ |
| 103 | "echo WARN: Cannot load the DT; " \ |
| 104 | "fi; " \ |
| 105 | "else " \ |
| 106 | "booti; " \ |
| 107 | "fi;\0" |
| 108 | |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 109 | /* Link Definitions */ |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 110 | |
| 111 | #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 |
| 112 | |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 113 | /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board, |
| 114 | * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, |
| 115 | * USDHC2 is for SD, USDHC3 is for SD on base board |
| 116 | */ |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 117 | #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ |
| 118 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
| 119 | |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 120 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
| 121 | #define PHYS_SDRAM_1 0x80000000 |
| 122 | #define PHYS_SDRAM_2 0x880000000 |
| 123 | #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ |
| 124 | /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */ |
| 125 | #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ |
| 126 | |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 127 | /* Generic Timer Definitions */ |
| 128 | #define COUNTER_FREQUENCY 8000000 /* 8MHz */ |
| 129 | |
| 130 | /* Networking */ |
| 131 | #define CONFIG_FEC_XCV_TYPE RGMII |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 132 | |
Simon Glass | fb64e36 | 2020-05-10 11:40:09 -0600 | [diff] [blame] | 133 | #include <linux/stringify.h> |
Oliver Graute | dafcd99 | 2019-09-20 07:08:41 +0000 | [diff] [blame] | 134 | #endif /* __IMX8QM_ROM7720_H */ |