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Jagan Teki5bc16d22018-12-31 15:35:01 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7#include <common.h>
8#include <clk-uclass.h>
9#include <dm.h>
10#include <errno.h>
Samuel Holland12e3faa2021-09-12 11:48:43 -050011#include <clk/sunxi.h>
Jagan Teki5bc16d22018-12-31 15:35:01 +053012#include <dt-bindings/clock/sun50i-h6-ccu.h>
13#include <dt-bindings/reset/sun50i-h6-ccu.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060014#include <linux/bitops.h>
Jagan Teki5bc16d22018-12-31 15:35:01 +053015
16static struct ccu_clk_gate h6_gates[] = {
Andre Przywaraddf33c12019-01-29 15:54:09 +000017 [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)),
18 [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)),
19 [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)),
Jagan Teki5bc16d22018-12-31 15:35:01 +053020 [CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
21 [CLK_BUS_UART1] = GATE(0x90c, BIT(1)),
22 [CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
23 [CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
Jagan Tekibc123132019-02-27 20:02:06 +053024
Samuel Hollandfa7a7fa2021-09-12 09:47:24 -050025 [CLK_BUS_I2C0] = GATE(0x91c, BIT(0)),
26 [CLK_BUS_I2C1] = GATE(0x91c, BIT(1)),
27 [CLK_BUS_I2C2] = GATE(0x91c, BIT(2)),
28 [CLK_BUS_I2C3] = GATE(0x91c, BIT(3)),
29
Jagan Tekibc123132019-02-27 20:02:06 +053030 [CLK_SPI0] = GATE(0x940, BIT(31)),
31 [CLK_SPI1] = GATE(0x944, BIT(31)),
32
33 [CLK_BUS_SPI0] = GATE(0x96c, BIT(0)),
34 [CLK_BUS_SPI1] = GATE(0x96c, BIT(1)),
Jagan Teki836631b2019-02-28 00:26:57 +053035
36 [CLK_BUS_EMAC] = GATE(0x97c, BIT(0)),
Andre Przywara60e6efd2019-06-23 15:09:48 +010037
38 [CLK_USB_PHY0] = GATE(0xa70, BIT(29)),
39 [CLK_USB_OHCI0] = GATE(0xa70, BIT(31)),
40
41 [CLK_USB_PHY1] = GATE(0xa74, BIT(29)),
42
43 [CLK_USB_HSIC] = GATE(0xa7c, BIT(26)),
44 [CLK_USB_HSIC_12M] = GATE(0xa7c, BIT(27)),
45 [CLK_USB_PHY3] = GATE(0xa7c, BIT(29)),
46 [CLK_USB_OHCI3] = GATE(0xa7c, BIT(31)),
47
48 [CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)),
49 [CLK_BUS_OHCI3] = GATE(0xa8c, BIT(3)),
50 [CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)),
Samuel Hollandd73b8a52021-02-07 23:57:20 -060051 [CLK_BUS_XHCI] = GATE(0xa8c, BIT(5)),
Andre Przywara60e6efd2019-06-23 15:09:48 +010052 [CLK_BUS_EHCI3] = GATE(0xa8c, BIT(7)),
53 [CLK_BUS_OTG] = GATE(0xa8c, BIT(8)),
Jagan Teki5bc16d22018-12-31 15:35:01 +053054};
55
56static struct ccu_reset h6_resets[] = {
Andre Przywaraddf33c12019-01-29 15:54:09 +000057 [RST_BUS_MMC0] = RESET(0x84c, BIT(16)),
58 [RST_BUS_MMC1] = RESET(0x84c, BIT(17)),
59 [RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
Jagan Teki5bc16d22018-12-31 15:35:01 +053060 [RST_BUS_UART0] = RESET(0x90c, BIT(16)),
61 [RST_BUS_UART1] = RESET(0x90c, BIT(17)),
62 [RST_BUS_UART2] = RESET(0x90c, BIT(18)),
63 [RST_BUS_UART3] = RESET(0x90c, BIT(19)),
Jagan Tekibc123132019-02-27 20:02:06 +053064
Samuel Hollandfa7a7fa2021-09-12 09:47:24 -050065 [RST_BUS_I2C0] = RESET(0x91c, BIT(16)),
66 [RST_BUS_I2C1] = RESET(0x91c, BIT(17)),
67 [RST_BUS_I2C2] = RESET(0x91c, BIT(18)),
68 [RST_BUS_I2C3] = RESET(0x91c, BIT(19)),
69
Jagan Tekibc123132019-02-27 20:02:06 +053070 [RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
71 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
Jagan Teki836631b2019-02-28 00:26:57 +053072
73 [RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
Andre Przywara60e6efd2019-06-23 15:09:48 +010074
75 [RST_USB_PHY0] = RESET(0xa70, BIT(30)),
76
77 [RST_USB_PHY1] = RESET(0xa74, BIT(30)),
78
79 [RST_USB_HSIC] = RESET(0xa7c, BIT(28)),
80 [RST_USB_PHY3] = RESET(0xa7c, BIT(30)),
81
82 [RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)),
83 [RST_BUS_OHCI3] = RESET(0xa8c, BIT(19)),
84 [RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)),
Samuel Hollandd73b8a52021-02-07 23:57:20 -060085 [RST_BUS_XHCI] = RESET(0xa8c, BIT(21)),
Andre Przywara60e6efd2019-06-23 15:09:48 +010086 [RST_BUS_EHCI3] = RESET(0xa8c, BIT(23)),
87 [RST_BUS_OTG] = RESET(0xa8c, BIT(24)),
Jagan Teki5bc16d22018-12-31 15:35:01 +053088};
89
90static const struct ccu_desc h6_ccu_desc = {
91 .gates = h6_gates,
92 .resets = h6_resets,
93};
94
95static int h6_clk_bind(struct udevice *dev)
96{
97 return sunxi_reset_bind(dev, ARRAY_SIZE(h6_resets));
98}
99
100static const struct udevice_id h6_ccu_ids[] = {
101 { .compatible = "allwinner,sun50i-h6-ccu",
102 .data = (ulong)&h6_ccu_desc },
103 { }
104};
105
106U_BOOT_DRIVER(clk_sun50i_h6) = {
107 .name = "sun50i_h6_ccu",
108 .id = UCLASS_CLK,
109 .of_match = h6_ccu_ids,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700110 .priv_auto = sizeof(struct ccu_priv),
Jagan Teki5bc16d22018-12-31 15:35:01 +0530111 .ops = &sunxi_clk_ops,
112 .probe = sunxi_clk_probe,
113 .bind = h6_clk_bind,
114};