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git01.mediatek.com / filogic / uboot / f1c145119f5fab8cded946dabbfae2d8d81f6a40 / . / dts / upstream / src / arm64 / amlogic / meson-gxbb-odroidc2.dts
blob: e6d2de7c45a9d7bd1b5ddcd0aff5921a2ad7f83f [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Andreas Färber
4 * Copyright (c) 2016 BayLibre, Inc.
5 * Author: Kevin Hilman <khilman@kernel.org>
6 */
7
8/dts-v1/;
9
10#include "meson-gxbb.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/sound/meson-aiu.h>
13
14/ {
15 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
16 model = "Hardkernel ODROID-C2";
17
18 aliases {
19 serial0 = &uart_AO;
20 ethernet0 = &ethmac;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory@0 {
28 device_type = "memory";
29 reg = <0x0 0x0 0x0 0x80000000>;
30 };
31
32 usb_otg_pwr: regulator-usb-pwrs {
33 compatible = "regulator-fixed";
34
35 regulator-name = "USB_OTG_PWR";
36
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
39
40 /*
41 * signal name from schematics: PWREN
42 */
43 gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
44 enable-active-high;
45 /*
46 * signal name from schematics: USB_POWER
47 */
48 vin-supply = <&p5v0>;
49 };
50
51 leds {
52 compatible = "gpio-leds";
53 led-blue {
54 label = "c2:blue:alive";
55 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
56 linux,default-trigger = "heartbeat";
57 default-state = "off";
58 };
59 };
60
61 p5v0: regulator-p5v0 {
62 compatible = "regulator-fixed";
63
64 regulator-name = "P5V0";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
67 regulator-always-on;
68 };
69
70 hdmi_p5v0: regulator-hdmi_p5v0 {
71 compatible = "regulator-fixed";
72 regulator-name = "HDMI_P5V0";
73 regulator-min-microvolt = <5000000>;
74 regulator-max-microvolt = <5000000>;
75 /* AP2331SA-7 */
76 vin-supply = <&p5v0>;
77 };
78
79 tflash_vdd: regulator-tflash_vdd {
80 compatible = "regulator-fixed";
81
82 regulator-name = "TFLASH_VDD";
83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <3300000>;
85
86 /*
87 * signal name from schematics: TFLASH_VDD_EN
88 */
89 gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
90 enable-active-high;
91 /* U16 RT9179GB */
92 vin-supply = <&vddio_ao3v3>;
93 };
94
95 tf_io: gpio-regulator-tf_io {
96 compatible = "regulator-gpio";
97
98 regulator-name = "TF_IO";
99 regulator-min-microvolt = <1800000>;
100 regulator-max-microvolt = <3300000>;
101
102 /*
103 * signal name from schematics: TF_3V3N_1V8_EN
104 */
105 gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
106 gpios-states = <0>;
107
108 states = <3300000 0>,
109 <1800000 1>;
110 /* U12/U13 RT9179GB */
111 vin-supply = <&vddio_ao3v3>;
112 };
113
114 vcc1v8: regulator-vcc1v8 {
115 compatible = "regulator-fixed";
116 regulator-name = "VCC1V8";
117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <1800000>;
119 regulator-always-on;
120 /* U18 RT9179GB */
121 vin-supply = <&vddio_ao3v3>;
122 };
123
124 vcc3v3: regulator-vcc3v3 {
125 compatible = "regulator-fixed";
126 regulator-name = "VCC3V3";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 };
130
131 vddio_ao1v8: regulator-vddio-ao1v8 {
132 compatible = "regulator-fixed";
133 regulator-name = "VDDIO_AO1V8";
134 regulator-min-microvolt = <1800000>;
135 regulator-max-microvolt = <1800000>;
136 regulator-always-on;
137 /* U17 RT9179GB */
138 vin-supply = <&p5v0>;
139 };
140
141 vddio_ao3v3: regulator-vddio-ao3v3 {
142 compatible = "regulator-fixed";
143 regulator-name = "VDDIO_AO3V3";
144 regulator-min-microvolt = <3300000>;
145 regulator-max-microvolt = <3300000>;
146 regulator-always-on;
147 /* U11 MP2161GJ-C499 */
148 vin-supply = <&p5v0>;
149 };
150
151 ddr3_1v5: regulator-ddr3_1v5 {
152 compatible = "regulator-fixed";
153 regulator-name = "DDR3_1V5";
154 regulator-min-microvolt = <1500000>;
155 regulator-max-microvolt = <1500000>;
156 regulator-always-on;
157 /* U15 MP2161GJ-C499 */
158 vin-supply = <&p5v0>;
159 };
160
161 emmc_pwrseq: emmc-pwrseq {
162 compatible = "mmc-pwrseq-emmc";
163 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
164 };
165
166 hdmi-connector {
167 compatible = "hdmi-connector";
168 type = "a";
169
170 port {
171 hdmi_connector_in: endpoint {
172 remote-endpoint = <&hdmi_tx_tmds_out>;
173 };
174 };
175 };
176
177 sound {
178 compatible = "amlogic,gx-sound-card";
179 model = "ODROID-C2";
180 assigned-clocks = <&clkc CLKID_MPLL0>,
181 <&clkc CLKID_MPLL1>,
182 <&clkc CLKID_MPLL2>;
183 assigned-clock-parents = <0>, <0>, <0>;
184 assigned-clock-rates = <294912000>,
185 <270950400>,
186 <393216000>;
187
188 dai-link-0 {
189 sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
190 };
191
192 dai-link-1 {
193 sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
194 dai-format = "i2s";
195 mclk-fs = <256>;
196
197 codec-0 {
198 sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
199 };
200 };
201
202 dai-link-2 {
203 sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
204
205 codec-0 {
206 sound-dai = <&hdmi_tx>;
207 };
208 };
209 };
210};
211
212&aiu {
213 status = "okay";
214};
215
216&cec_AO {
217 status = "okay";
218 pinctrl-0 = <&ao_cec_pins>;
219 pinctrl-names = "default";
220 hdmi-phandle = <&hdmi_tx>;
221};
222
223&ethmac {
224 status = "okay";
225 pinctrl-0 = <&eth_rgmii_pins>;
226 pinctrl-names = "default";
227 phy-handle = <&eth_phy0>;
228 phy-mode = "rgmii";
229
230 amlogic,tx-delay-ns = <2>;
231
232 mdio {
233 compatible = "snps,dwmac-mdio";
234 #address-cells = <1>;
235 #size-cells = <0>;
236
237 eth_phy0: ethernet-phy@0 {
238 /* Realtek RTL8211F (0x001cc916) */
239 reg = <0>;
240
241 reset-assert-us = <10000>;
242 reset-deassert-us = <80000>;
243 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
244
245 interrupt-parent = <&gpio_intc>;
246 /* MAC_INTR on GPIOZ_15 */
247 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
248 };
249 };
250};
251
252&hdmi_tx {
253 status = "okay";
254 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
255 pinctrl-names = "default";
256 hdmi-supply = <&hdmi_p5v0>;
257};
258
259&hdmi_tx_tmds_port {
260 hdmi_tx_tmds_out: endpoint {
261 remote-endpoint = <&hdmi_connector_in>;
262 };
263};
264
265&i2c_A {
266 status = "okay";
267 pinctrl-0 = <&i2c_a_pins>;
268 pinctrl-names = "default";
269};
270
271&ir {
272 status = "okay";
273 pinctrl-0 = <&remote_input_ao_pins>;
274 pinctrl-names = "default";
275 linux,rc-map-name = "rc-odroid";
276};
277
278&gpio_ao {
279 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
280 "USB HUB nRESET", "USB OTG Power En",
281 "J7 Header Pin2", "IR In", "J7 Header Pin4",
282 "J7 Header Pin6", "J7 Header Pin5", "J7 Header Pin7",
283 "HDMI CEC", "SYS LED",
284 /* GPIO_TEST_N */
285 "";
286};
287
288&gpio {
289 gpio-line-names = /* Bank GPIOZ */
290 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
291 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
292 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
293 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
294 "Eth PHY nRESET", "Eth PHY Intc",
295 /* Bank GPIOH */
296 "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
297 /* Bank BOOT */
298 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
299 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
300 "eMMC Reset", "eMMC CMD",
301 "", "", "", "", "", "", "",
302 /* Bank CARD */
303 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
304 "SDCard D3", "SDCard D2", "SDCard Det",
305 /* Bank GPIODV */
306 "", "", "", "", "", "", "", "", "", "", "", "", "",
307 "", "", "", "", "", "", "", "", "", "", "",
308 "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
309 "PWM D", "PWM B",
310 /* Bank GPIOY */
311 "Revision Bit0", "Revision Bit1", "",
312 "J2 Header Pin35", "", "", "", "J2 Header Pin36",
313 "J2 Header Pin31", "", "", "", "TF VDD En",
314 "J2 Header Pin32", "J2 Header Pin26", "", "",
315 /* Bank GPIOX */
316 "J2 Header Pin29", "J2 Header Pin24",
317 "J2 Header Pin23", "J2 Header Pin22",
318 "J2 Header Pin21", "J2 Header Pin18",
319 "J2 Header Pin33", "J2 Header Pin19",
320 "J2 Header Pin16", "J2 Header Pin15",
321 "J2 Header Pin12", "J2 Header Pin13",
322 "J2 Header Pin8", "J2 Header Pin10",
323 "", "", "", "", "",
324 "J2 Header Pin11", "", "J2 Header Pin7", "",
325 /* Bank GPIOCLK */
326 "", "", "", "";
327};
328
329&saradc {
330 status = "okay";
331 vref-supply = <&vcc1v8>;
332};
333
334&scpi_clocks {
335 status = "disabled";
336};
337
338/* SD */
339&sd_emmc_b {
340 status = "okay";
341 pinctrl-0 = <&sdcard_pins>;
342 pinctrl-1 = <&sdcard_clk_gate_pins>;
343 pinctrl-names = "default", "clk-gate";
344
345 bus-width = <4>;
346 cap-sd-highspeed;
347 sd-uhs-sdr12;
348 sd-uhs-sdr25;
349 sd-uhs-sdr50;
350 sd-uhs-ddr50;
351 max-frequency = <100000000>;
352 disable-wp;
353
354 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
355
356 vmmc-supply = <&tflash_vdd>;
357 vqmmc-supply = <&tf_io>;
358};
359
360/* eMMC */
361&sd_emmc_c {
362 status = "okay";
363 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
364 pinctrl-1 = <&emmc_clk_gate_pins>;
365 pinctrl-names = "default", "clk-gate";
366
367 bus-width = <8>;
368 max-frequency = <200000000>;
369 non-removable;
370 disable-wp;
371 cap-mmc-highspeed;
372 mmc-ddr-1_8v;
373 mmc-hs200-1_8v;
374
375 mmc-pwrseq = <&emmc_pwrseq>;
376 vmmc-supply = <&vcc3v3>;
377 vqmmc-supply = <&vcc1v8>;
378};
379
380&uart_AO {
381 status = "okay";
382 pinctrl-0 = <&uart_ao_a_pins>;
383 pinctrl-names = "default";
384};
385
386&usb0_phy {
387 status = "disabled";
388 phy-supply = <&usb_otg_pwr>;
389};
390
391&usb1_phy {
392 status = "okay";
393 phy-supply = <&usb_otg_pwr>;
394};
395
396&usb0 {
397 status = "disabled";
398};
399
400&usb1 {
401 dr_mode = "host";
402 #address-cells = <1>;
403 #size-cells = <0>;
404 status = "okay";
405
406 hub@1 {
407 /* Genesys Logic GL852G USB 2.0 hub */
408 compatible = "usb5e3,610";
409 reg = <1>;
410 vdd-supply = <&p5v0>;
411 reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
412 };
413};