blob: c4422f5870556bd19272b976845cc2b7b5729911 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001/*
2 * NXP LPC4350 and LPC4330 SoC
3 *
4 * Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
5 *
6 * This code is released using a dual license strategy: BSD/GPL
7 * You can choose the licence that better fits your requirements.
8 *
9 * Released under the terms of 3-clause BSD License
10 * Released under the terms of GNU General Public License Version 2.0
11 *
12 */
13
14/ {
15 compatible = "nxp,lpc4350", "nxp,lpc4330";
16
17 cpus {
18 cpu@0 {
19 compatible = "arm,cortex-m4";
20 };
21 };
22
23 soc {
24 sram0: sram@10000000 {
25 compatible = "mmio-sram";
26 reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
27 };
28
29 sram1: sram@10080000 {
30 compatible = "mmio-sram";
31 reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
32 };
33
34 sram2: sram@20000000 {
35 compatible = "mmio-sram";
36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
37 };
38 };
39};