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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Philip, Avinash09ee9e82013-08-30 16:28:43 -04002/*
3 * (C) Copyright 2011-2013
4 * Texas Instruments, <www.ti.com>
Philip, Avinash09ee9e82013-08-30 16:28:43 -04005 */
6
Tom Riniabb9a042024-05-18 20:20:43 -06007#include <common.h>
Philip, Avinash09ee9e82013-08-30 16:28:43 -04008#include <i2c.h>
9#include <power/tps65910.h>
10
Marek BehĂșn4bebdd32021-05-20 13:23:52 +020011struct udevice *tps65910_dev __section(".data") = NULL;
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010012
13static inline int tps65910_read_reg(int addr, uchar *buf)
14{
Igor Opaniukf7c91762021-02-09 13:52:45 +020015#if !CONFIG_IS_ENABLED(DM_I2C)
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010016 return i2c_read(TPS65910_CTRL_I2C_ADDR, addr, 1, buf, 1);
17#else
18 int rc;
19
20 rc = dm_i2c_reg_read(tps65910_dev, addr);
21 if (rc < 0)
22 return rc;
23 *buf = (uchar)rc;
24 return 0;
25#endif
26}
27
28static inline int tps65910_write_reg(int addr, uchar *buf)
29{
Igor Opaniukf7c91762021-02-09 13:52:45 +020030#if !CONFIG_IS_ENABLED(DM_I2C)
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010031 return i2c_write(TPS65910_CTRL_I2C_ADDR, addr, 1, buf, 1);
32#else
33 return dm_i2c_reg_write(tps65910_dev, addr, *buf);
34#endif
35}
36
37int power_tps65910_init(unsigned char bus)
38{
Igor Opaniukf7c91762021-02-09 13:52:45 +020039#if CONFIG_IS_ENABLED(DM_I2C)
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010040 struct udevice *dev = NULL;
41 int rc;
42
43 rc = i2c_get_chip_for_busnum(bus, TPS65910_CTRL_I2C_ADDR, 1, &dev);
44
45 if (rc)
46 return rc;
47 tps65910_dev = dev;
48#endif
49 return 0;
50}
51
Philip, Avinash09ee9e82013-08-30 16:28:43 -040052/*
53 * tps65910_set_i2c_control() - Set the TPS65910 to be controlled via the I2C
Wolfgang Denk62fb2b42021-09-27 17:42:39 +020054 * interface.
Philip, Avinash09ee9e82013-08-30 16:28:43 -040055 * @return: 0 on success, not 0 on failure
56 */
57int tps65910_set_i2c_control(void)
58{
59 int ret;
60 uchar buf;
61
62 /* VDD1/2 voltage selection register access by control i/f */
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010063 ret = tps65910_read_reg(TPS65910_DEVCTRL_REG, &buf);
Philip, Avinash09ee9e82013-08-30 16:28:43 -040064
65 if (ret)
66 return ret;
67
68 buf |= TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C;
69
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010070 return tps65910_write_reg(TPS65910_DEVCTRL_REG, &buf);
Philip, Avinash09ee9e82013-08-30 16:28:43 -040071}
72
73/*
74 * tps65910_voltage_update() - Voltage switching for MPU frequency switching.
75 * @module: mpu - 0, core - 1
76 * @vddx_op_vol_sel: vdd voltage to set
77 * @return: 0 on success, not 0 on failure
78 */
79int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel)
80{
81 uchar buf;
82 unsigned int reg_offset;
83 int ret;
84
85 if (module == MPU)
86 reg_offset = TPS65910_VDD1_OP_REG;
87 else
88 reg_offset = TPS65910_VDD2_OP_REG;
89
90 /* Select VDDx OP */
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010091 ret = tps65910_read_reg(reg_offset, &buf);
Philip, Avinash09ee9e82013-08-30 16:28:43 -040092 if (ret)
93 return ret;
94
95 buf &= ~TPS65910_OP_REG_CMD_MASK;
96
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +010097 ret = tps65910_write_reg(reg_offset, &buf);
Philip, Avinash09ee9e82013-08-30 16:28:43 -040098 if (ret)
99 return ret;
100
101 /* Configure VDDx OP Voltage */
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +0100102 ret = tps65910_read_reg(reg_offset, &buf);
Philip, Avinash09ee9e82013-08-30 16:28:43 -0400103 if (ret)
104 return ret;
105
106 buf &= ~TPS65910_OP_REG_SEL_MASK;
107 buf |= vddx_op_vol_sel;
108
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +0100109 ret = tps65910_write_reg(reg_offset, &buf);
Philip, Avinash09ee9e82013-08-30 16:28:43 -0400110 if (ret)
111 return ret;
112
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +0100113 ret = tps65910_read_reg(reg_offset, &buf);
Philip, Avinash09ee9e82013-08-30 16:28:43 -0400114 if (ret)
115 return ret;
116
117 if ((buf & TPS65910_OP_REG_SEL_MASK) != vddx_op_vol_sel)
118 return 1;
119
120 return 0;
121}