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wdenkaffae2b2002-08-17 09:36:01 +00001/*
2 * Support for indirect PCI bridges.
3 *
4 * Copyright (C) 1998 Gabriel Paubert.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <common.h>
13
Michael Schwingenb9de2fa2011-05-23 00:00:12 +020014#if !defined(__I386__)
wdenkaffae2b2002-08-17 09:36:01 +000015
16#include <asm/processor.h>
17#include <asm/io.h>
18#include <pci.h>
19
20#define cfg_read(val, addr, type, op) *val = op((type)(addr))
21#define cfg_write(val, addr, type, op) op((type *)(addr), (val))
22
wdenkbf2f8c92003-05-22 22:52:13 +000023#if defined(CONFIG_MPC8260)
wdenkaffae2b2002-08-17 09:36:01 +000024#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
25static int \
Wolfgang Denka1be4762008-05-20 16:00:29 +020026indirect_##rw##_config_##size(struct pci_controller *hose, \
wdenkaffae2b2002-08-17 09:36:01 +000027 pci_dev_t dev, int offset, type val) \
28{ \
Kumar Gala233b9922006-01-12 15:30:24 -060029 u32 b, d,f; \
30 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
31 b = b - hose->first_busno; \
32 dev = PCI_BDF(b, d, f); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020033 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
wdenk28536032003-03-25 16:50:56 +000034 sync(); \
wdenkaffae2b2002-08-17 09:36:01 +000035 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020036 return 0; \
wdenkaffae2b2002-08-17 09:36:01 +000037}
Ed Swarthout09489ff2007-07-11 14:52:01 -050038#elif defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
wdenk9c53f402003-10-15 23:53:47 +000039#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
40static int \
41indirect_##rw##_config_##size(struct pci_controller *hose, \
42 pci_dev_t dev, int offset, type val) \
43{ \
Kumar Gala233b9922006-01-12 15:30:24 -060044 u32 b, d,f; \
45 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
46 b = b - hose->first_busno; \
47 dev = PCI_BDF(b, d, f); \
Ed Swarthout09489ff2007-07-11 14:52:01 -050048 *(hose->cfg_addr) = dev | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; \
wdenk9c53f402003-10-15 23:53:47 +000049 sync(); \
50 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
51 return 0; \
52}
Felix Radenskybcaaeb82010-01-23 01:35:24 +020053#elif defined(CONFIG_440GX) || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \
54 defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT)
wdenk56ed43e2004-02-22 23:46:08 +000055#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
56static int \
Wolfgang Denka1be4762008-05-20 16:00:29 +020057indirect_##rw##_config_##size(struct pci_controller *hose, \
wdenk56ed43e2004-02-22 23:46:08 +000058 pci_dev_t dev, int offset, type val) \
59{ \
Kumar Gala233b9922006-01-12 15:30:24 -060060 u32 b, d,f; \
61 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
62 b = b - hose->first_busno; \
63 dev = PCI_BDF(b, d, f); \
wdenk56ed43e2004-02-22 23:46:08 +000064 if (PCI_BUS(dev) > 0) \
65 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
66 else \
67 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
68 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020069 return 0; \
wdenk56ed43e2004-02-22 23:46:08 +000070}
wdenk28536032003-03-25 16:50:56 +000071#else
72#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
73static int \
Wolfgang Denka1be4762008-05-20 16:00:29 +020074indirect_##rw##_config_##size(struct pci_controller *hose, \
wdenk28536032003-03-25 16:50:56 +000075 pci_dev_t dev, int offset, type val) \
76{ \
Kumar Gala233b9922006-01-12 15:30:24 -060077 u32 b, d,f; \
78 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
79 b = b - hose->first_busno; \
80 dev = PCI_BDF(b, d, f); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020081 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
wdenk28536032003-03-25 16:50:56 +000082 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020083 return 0; \
wdenk28536032003-03-25 16:50:56 +000084}
85#endif
wdenkaffae2b2002-08-17 09:36:01 +000086
87#define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \
88static int \
Wolfgang Denka1be4762008-05-20 16:00:29 +020089indirect_##rw##_config_##size(struct pci_controller *hose, \
wdenkaffae2b2002-08-17 09:36:01 +000090 pci_dev_t dev, int offset, type val) \
91{ \
92 unsigned int msr = mfmsr(); \
93 mtmsr(msr & ~(MSR_EE | MSR_CE)); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020094 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
wdenkaffae2b2002-08-17 09:36:01 +000095 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020096 out_le32(hose->cfg_addr, 0x00000000); \
wdenkaffae2b2002-08-17 09:36:01 +000097 mtmsr(msr); \
Wolfgang Denka1be4762008-05-20 16:00:29 +020098 return 0; \
wdenkaffae2b2002-08-17 09:36:01 +000099}
100
101INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
102INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
103INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
104#ifdef CONFIG_405GP
105INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
106INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
107INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
108#else
109INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
110INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
111INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
112#endif
113
114void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
115{
116 pci_set_ops(hose,
117 indirect_read_config_byte,
118 indirect_read_config_word,
119 indirect_read_config_dword,
120 indirect_write_config_byte,
121 indirect_write_config_word,
122 indirect_write_config_dword);
123
124 hose->cfg_addr = (unsigned int *) cfg_addr;
125 hose->cfg_data = (unsigned char *) cfg_data;
126}
127
Michael Schwingenb9de2fa2011-05-23 00:00:12 +0200128#endif /* !__I386__ */