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wdenk62cb5cf2005-05-19 22:46:33 +00001/*
2 * (C) Copyright 2005
3 * Greg Ungerer <greg.ungerer@opengear.com>.
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 * (easy to change)
30 */
31#define CONFIG_KS8695 1 /* it is a KS8695 CPU */
32#define CONFIG_CM41xx 1 /* it is an OpenGear CM41xx boad */
33
wdenk62cb5cf2005-05-19 22:46:33 +000034#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
35#define CONFIG_SETUP_MEMORY_TAGS 1
36#define CONFIG_INITRD_TAG 1
37
wdenkf593f462005-05-23 10:49:50 +000038#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */
39
wdenk62cb5cf2005-05-19 22:46:33 +000040/*
41 * Size of malloc() pool
42 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020043#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
wdenk62cb5cf2005-05-19 22:46:33 +000044
45/*
46 * Hardware drivers
47 */
48
49/*
50 * select serial console configuration
51 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +020052#define CONFIG_ENV_IS_NOWHERE
Jean-Christophe PLAGNIOL-VILLARDb2c4d402009-03-29 23:01:42 +020053#define CONFIG_KS8695_SERIAL
wdenk62cb5cf2005-05-19 22:46:33 +000054#define CONFIG_SERIAL1
55#define CONFIG_CONS_INDEX 1
56#define CONFIG_BAUDRATE 115200
Jon Loeliger37ec35e2007-07-04 22:31:56 -050057
58/*
Jon Loeligere54e77a2007-07-10 09:29:01 -050059 * BOOTP options
60 */
61#define CONFIG_BOOTP_BOOTFILESIZE
62#define CONFIG_BOOTP_BOOTPATH
63#define CONFIG_BOOTP_GATEWAY
64#define CONFIG_BOOTP_HOSTNAME
65
66
67/*
Jon Loeliger37ec35e2007-07-04 22:31:56 -050068 * Command line configuration.
69 */
70#include <config_cmd_default.h>
71
Mike Frysinger78dcaf42009-01-28 19:08:14 -050072#undef CONFIG_CMD_SAVEENV
Jon Loeliger37ec35e2007-07-04 22:31:56 -050073
wdenk62cb5cf2005-05-19 22:46:33 +000074
75#define CONFIG_BOOTDELAY 0
76#define CONFIG_BOOTARGS "mem=32M console=ttyAM0,115200"
77#define CONFIG_BOOTCOMMAND "gofsk 0x02200000"
78
79/*
80 * Miscellaneous configurable options
81 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#define CONFIG_SYS_LONGHELP /* undef to save memory */
83#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
84#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
85#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
86#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
87#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk62cb5cf2005-05-19 22:46:33 +000088
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */
90#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */
wdenk62cb5cf2005-05-19 22:46:33 +000091
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020092#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
wdenk62cb5cf2005-05-19 22:46:33 +000093
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020094#define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */
wdenk62cb5cf2005-05-19 22:46:33 +000095
96/*-----------------------------------------------------------------------
wdenk62cb5cf2005-05-19 22:46:33 +000097 * Physical Memory Map
98 */
99#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
100#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
101#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
Greg Ungerer93840ee2011-09-09 22:23:18 +1000102#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
103
104#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */
wdenk62cb5cf2005-05-19 22:46:33 +0000105
106#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */
107#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200108#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenk62cb5cf2005-05-19 22:46:33 +0000109
110/*-----------------------------------------------------------------------
111 * FLASH and environment organization
112 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200113#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
114#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
wdenk62cb5cf2005-05-19 22:46:33 +0000115
116/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200117#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
118#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenk62cb5cf2005-05-19 22:46:33 +0000119
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200120#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment */
wdenk62cb5cf2005-05-19 22:46:33 +0000121
122#endif /* __CONFIG_H */