wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * Based on sc520cdp.c from rolo 1.6: |
| 26 | *---------------------------------------------------------------------- |
| 27 | * (C) Copyright 2000 |
| 28 | * Sysgo Real-Time Solutions GmbH |
| 29 | * Klein-Winternheim, Germany |
| 30 | *---------------------------------------------------------------------- |
| 31 | */ |
| 32 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 33 | #include <config.h> |
| 34 | |
| 35 | #ifdef CONFIG_ALI152X |
| 36 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 37 | #include <common.h> |
| 38 | #include <asm/io.h> |
| 39 | #include <asm/ic/ali512x.h> |
| 40 | |
| 41 | |
| 42 | /* ALI M5123 Logical device numbers: |
| 43 | * 0 FDC |
| 44 | * 1 unused? |
| 45 | * 2 unused? |
| 46 | * 3 lpt |
| 47 | * 4 UART1 |
| 48 | * 5 UART2 |
| 49 | * 6 RTC |
| 50 | * 7 mouse/kbd |
| 51 | * 8 CIO |
| 52 | */ |
| 53 | |
| 54 | /* |
| 55 | ************************************************************ |
| 56 | * Some access primitives for the ALi chip: * |
| 57 | ************************************************************ |
| 58 | */ |
| 59 | |
| 60 | static void ali_write(u8 index, u8 value) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 61 | { |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 62 | /* write an arbirary register */ |
| 63 | outb(index, ALI_INDEX); |
| 64 | outb(value, ALI_DATA); |
| 65 | } |
| 66 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 67 | #if 0 |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 68 | static int ali_read(u8 index) |
| 69 | { |
| 70 | outb(index, ALI_INDEX); |
| 71 | return inb(ALI_DATA); |
| 72 | } |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 73 | #endif |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 74 | |
| 75 | #define ALI_OPEN() \ |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 76 | outb(0x51, ALI_INDEX); \ |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 77 | outb(0x23, ALI_INDEX) |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 78 | |
| 79 | |
| 80 | #define ALI_CLOSE() \ |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 81 | outb(0xbb, ALI_INDEX) |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 82 | |
| 83 | /* Select a logical device */ |
| 84 | #define ALI_SELDEV(dev) \ |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 85 | ali_write(0x07, dev) |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 86 | |
| 87 | |
| 88 | void ali512x_init(void) |
| 89 | { |
| 90 | ALI_OPEN(); |
| 91 | |
| 92 | ali_write(0x02, 0x01); /* soft reset */ |
| 93 | ali_write(0x03, 0x03); /* disable access to CIOs */ |
| 94 | ali_write(0x22, 0x00); /* disable direct powerdown */ |
| 95 | ali_write(0x23, 0x00); /* disable auto powerdown */ |
| 96 | ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */ |
| 97 | |
| 98 | ALI_CLOSE(); |
| 99 | } |
| 100 | |
| 101 | void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel) |
| 102 | { |
| 103 | ALI_OPEN(); |
| 104 | ALI_SELDEV(0); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 105 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 106 | ali_write(0x30, enabled?1:0); |
| 107 | if (enabled) { |
| 108 | ali_write(0x60, io >> 8); |
| 109 | ali_write(0x61, io & 0xff); |
| 110 | ali_write(0x70, irq); |
| 111 | ali_write(0x74, dma_channel); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 112 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 113 | /* AT mode, no drive swap */ |
| 114 | ali_write(0xf0, 0x08); |
| 115 | ali_write(0xf1, 0x00); |
| 116 | ali_write(0xf2, 0xff); |
| 117 | ali_write(0xf4, 0x00); |
| 118 | } |
| 119 | ALI_CLOSE(); |
| 120 | } |
| 121 | |
| 122 | |
| 123 | void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel) |
| 124 | { |
| 125 | ALI_OPEN(); |
| 126 | ALI_SELDEV(3); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 127 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 128 | ali_write(0x30, enabled?1:0); |
| 129 | if (enabled) { |
| 130 | ali_write(0x60, io >> 8); |
| 131 | ali_write(0x61, io & 0xff); |
| 132 | ali_write(0x70, irq); |
| 133 | ali_write(0x74, dma_channel); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 134 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 135 | /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */ |
| 136 | ali_write(0xf0, 0xbc); |
| 137 | /* 12 MHz, Burst DMA in ECP */ |
| 138 | ali_write(0xf1, 0x05); |
| 139 | } |
| 140 | ALI_CLOSE(); |
| 141 | |
| 142 | } |
| 143 | |
| 144 | void ali512x_set_uart(int enabled, int index, u16 io, u8 irq) |
| 145 | { |
| 146 | ALI_OPEN(); |
| 147 | ALI_SELDEV(index?5:4); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 148 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 149 | ali_write(0x30, enabled?1:0); |
| 150 | if (enabled) { |
| 151 | ali_write(0x60, io >> 8); |
| 152 | ali_write(0x61, io & 0xff); |
| 153 | ali_write(0x70, irq); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 154 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 155 | ali_write(0xf0, 0x00); |
| 156 | ali_write(0xf1, 0x00); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 157 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 158 | /* huh? write 0xf2 twice - a typo in rolo |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 159 | * or some secret ali errata? Who knows? |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 160 | */ |
| 161 | if (index) { |
| 162 | ali_write(0xf2, 0x00); |
| 163 | } |
| 164 | ali_write(0xf2, 0x0c); |
| 165 | } |
| 166 | ALI_CLOSE(); |
| 167 | |
| 168 | } |
| 169 | |
| 170 | void ali512x_set_uart2_irda(int enabled) |
| 171 | { |
| 172 | ALI_OPEN(); |
| 173 | ALI_SELDEV(5); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 174 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 175 | ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */ |
| 176 | ALI_CLOSE(); |
| 177 | |
| 178 | } |
| 179 | |
| 180 | void ali512x_set_rtc(int enabled, u16 io, u8 irq) |
| 181 | { |
| 182 | ALI_OPEN(); |
| 183 | ALI_SELDEV(6); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 184 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 185 | ali_write(0x30, enabled?1:0); |
| 186 | if (enabled) { |
| 187 | ali_write(0x60, io >> 8); |
| 188 | ali_write(0x61, io & 0xff); |
| 189 | ali_write(0x70, irq); |
| 190 | |
| 191 | ali_write(0xf0, 0x00); |
| 192 | } |
| 193 | ALI_CLOSE(); |
| 194 | } |
| 195 | |
| 196 | void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq) |
| 197 | { |
| 198 | ALI_OPEN(); |
| 199 | ALI_SELDEV(7); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 200 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 201 | ali_write(0x30, enabled?1:0); |
| 202 | if (enabled) { |
| 203 | ali_write(0x70, kbc_irq); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 204 | ali_write(0x72, mouse_irq); |
| 205 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 206 | ali_write(0xf0, 0x00); |
| 207 | } |
| 208 | ALI_CLOSE(); |
| 209 | } |
| 210 | |
| 211 | |
| 212 | /* Common I/O |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 213 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 214 | * (This descripotsion is base on several incompete sources |
| 215 | * since I have not been able to obtain any datasheet for the device |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 216 | * there may be some mis-understandings burried in here. |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 217 | * -- Daniel daniel@omicron.se) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 218 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 219 | * There are 22 CIO pins numbered |
| 220 | * 10-17 |
| 221 | * 20-25 |
| 222 | * 30-37 |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 223 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 224 | * 20-24 are dedicated CIO pins, the other 17 are muliplexed with |
| 225 | * other functions. |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 226 | * |
| 227 | * Secondary |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 228 | * CIO Pin Function Decription |
| 229 | * ======================================================= |
| 230 | * CIO10 IRQIN1 Interrupt input 1? |
| 231 | * CIO11 IRQIN2 Interrupt input 2? |
| 232 | * CIO12 IRRX IrDa Receive |
| 233 | * CIO13 IRTX IrDa Transmit |
| 234 | * CIO14 P21 KBC P21 fucntion |
| 235 | * CIO15 P20 KBC P21 fucntion |
| 236 | * CIO16 I2C_CLK I2C Clock |
| 237 | * CIO17 I2C_DAT I2C Data |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 238 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 239 | * CIO20 - |
| 240 | * CIO21 - |
| 241 | * CIO22 - |
| 242 | * CIO23 - |
| 243 | * CIO24 - |
| 244 | * CIO25 LOCK Keylock |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 245 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 246 | * CIO30 KBC_CLK Keybaord Clock |
| 247 | * CIO31 CS0J General Chip Select decoder CS0J |
| 248 | * CIO32 CS1J General Chip Select decoder CS1J |
| 249 | * CIO33 ALT_KCLK Alternative Keyboard Clock |
| 250 | * CIO34 ALT_KDAT Alternative Keyboard Data |
| 251 | * CIO35 ALT_MCLK Alternative Mouse Clock |
| 252 | * CIO36 ALT_MDAT Alternative Mouse Data |
| 253 | * CIO37 ALT_KBC Alternative KBC select |
| 254 | * |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 255 | * The CIO use an indirect address scheme. |
| 256 | * |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 257 | * Reigster 3 in the SIO is used to select the index and data |
| 258 | * port addresses where the CIO I/O registers show up. |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 259 | * The function selection registers are accessible under |
| 260 | * function SIO 8. |
| 261 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 262 | * SIO reigster 3 (CIO Address Selection) bit definitions: |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 263 | * bit 7 CIO index and data registers enabled |
| 264 | * bit 1-0 CIO indirect registers port address select |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 265 | * 0 index = 0xE0 data = 0xE1 |
| 266 | * 1 index = 0xE2 data = 0xE3 |
| 267 | * 2 index = 0xE4 data = 0xE5 |
| 268 | * 3 index = 0xEA data = 0xEB |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 269 | * |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 270 | * There are three CIO I/O register accessed via CIO index port and CIO data port |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 271 | * 0x01 CIO 10-17 data |
| 272 | * 0x02 CIO 20-25 data (bits 7-6 unused) |
| 273 | * 0x03 CIO 30-37 data |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 274 | * |
| 275 | * |
| 276 | * The pin function is accessed through normal |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 277 | * SIO registers, each register have the same format: |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 278 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 279 | * Bit Function Value |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 280 | * 0 Input/output 1=input |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 281 | * 1 Polarity of signal 1=inverted |
| 282 | * 2 Unused ?? |
| 283 | * 3 Function (normal or special) 1=special |
| 284 | * 7-4 Unused |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 285 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 286 | * SIO REG |
| 287 | * 0xe0 CIO 10 Config |
| 288 | * 0xe1 CIO 11 Config |
| 289 | * 0xe2 CIO 12 Config |
| 290 | * 0xe3 CIO 13 Config |
| 291 | * 0xe4 CIO 14 Config |
| 292 | * 0xe5 CIO 15 Config |
| 293 | * 0xe6 CIO 16 Config |
| 294 | * 0xe7 CIO 16 Config |
| 295 | * |
| 296 | * 0xe8 CIO 20 Config |
| 297 | * 0xe9 CIO 21 Config |
| 298 | * 0xea CIO 22 Config |
| 299 | * 0xeb CIO 23 Config |
| 300 | * 0xec CIO 24 Config |
| 301 | * 0xed CIO 25 Config |
| 302 | * |
| 303 | * 0xf5 CIO 30 Config |
| 304 | * 0xf6 CIO 31 Config |
| 305 | * 0xf7 CIO 32 Config |
| 306 | * 0xf8 CIO 33 Config |
| 307 | * 0xf9 CIO 34 Config |
| 308 | * 0xfa CIO 35 Config |
| 309 | * 0xfb CIO 36 Config |
| 310 | * 0xfc CIO 37 Config |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 311 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 312 | */ |
| 313 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 314 | #define ALI_CIO_PORT_SEL 0x83 |
| 315 | #define ALI_CIO_INDEX 0xea |
| 316 | #define ALI_CIO_DATA 0xeb |
| 317 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 318 | void ali512x_set_cio(int enabled) |
| 319 | { |
| 320 | int i; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 321 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 322 | ALI_OPEN(); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 323 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 324 | if (enabled) { |
| 325 | ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */ |
| 326 | } else { |
| 327 | ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80); |
| 328 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 329 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 330 | ALI_SELDEV(8); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 331 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 332 | ali_write(0x30, enabled?1:0); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 333 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 334 | /* set all pins to input to start with */ |
| 335 | for (i=0xe0;i<0xee;i++) { |
| 336 | ali_write(i, 1); |
| 337 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 338 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 339 | for (i=0xf5;i<0xfe;i++) { |
| 340 | ali_write(i, 1); |
| 341 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 342 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 343 | ALI_CLOSE(); |
| 344 | } |
| 345 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 346 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 347 | void ali512x_cio_function(int pin, int special, int inv, int input) |
| 348 | { |
| 349 | u8 data; |
| 350 | u8 addr; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 351 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 352 | /* valid pins are 10-17, 20-25 and 30-37 */ |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 353 | if (pin >= 10 && pin <= 17) { |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 354 | addr = 0xe0+(pin&7); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 355 | } else if (pin >= 20 && pin <= 25) { |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 356 | addr = 0xe8+(pin&7); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 357 | } else if (pin >= 30 && pin <= 37) { |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 358 | addr = 0xf5+(pin&7); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 359 | } else { |
| 360 | return; |
| 361 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 362 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 363 | ALI_OPEN(); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 364 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 365 | ALI_SELDEV(8); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 366 | |
| 367 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 368 | data=0xf4; |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 369 | if (special) { |
| 370 | data |= 0x08; |
| 371 | } else { |
| 372 | if (inv) { |
| 373 | data |= 0x02; |
| 374 | } |
| 375 | if (input) { |
| 376 | data |= 0x01; |
| 377 | } |
| 378 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 379 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 380 | ali_write(addr, data); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 381 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 382 | ALI_CLOSE(); |
| 383 | } |
| 384 | |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 385 | void ali512x_cio_out(int pin, int value) |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 386 | { |
| 387 | u8 reg; |
| 388 | u8 data; |
| 389 | u8 bit; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 390 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 391 | reg = pin/10; |
| 392 | bit = 1 << (pin%10); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 393 | |
| 394 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 395 | outb(reg, ALI_CIO_INDEX); /* select I/O register */ |
| 396 | data = inb(ALI_CIO_DATA); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 397 | if (value) { |
| 398 | data |= bit; |
| 399 | } else { |
| 400 | data &= ~bit; |
| 401 | } |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 402 | outb(data, ALI_CIO_DATA); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 403 | } |
| 404 | |
| 405 | int ali512x_cio_in(int pin) |
| 406 | { |
| 407 | u8 reg; |
| 408 | u8 data; |
| 409 | u8 bit; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 410 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 411 | /* valid pins are 10-17, 20-25 and 30-37 */ |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 412 | reg = pin/10; |
| 413 | bit = 1 << (pin%10); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 414 | |
| 415 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 416 | outb(reg, ALI_CIO_INDEX); /* select I/O register */ |
| 417 | data = inb(ALI_CIO_DATA); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 418 | |
| 419 | return data & bit; |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 420 | } |
| 421 | |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 422 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 423 | #endif |