blob: 4ab3c402ed834163019516fb5341d11a50653f95 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass36ad2342015-06-23 15:39:15 -06002/*
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Stephen Warrena9622432016-06-17 09:44:00 -06005 * Copyright (c) 2016, NVIDIA CORPORATION.
Philipp Tomsich9cf03b02018-01-08 13:59:18 +01006 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
Simon Glass36ad2342015-06-23 15:39:15 -06007 */
8
9#include <common.h>
10#include <clk.h>
Stephen Warrena9622432016-06-17 09:44:00 -060011#include <clk-uclass.h>
Simon Glass36ad2342015-06-23 15:39:15 -060012#include <dm.h>
Simon Glass589d9152016-07-04 11:58:03 -060013#include <dt-structs.h>
Simon Glass36ad2342015-06-23 15:39:15 -060014#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060015#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070016#include <malloc.h>
Claudiu Bezneac8c16002020-09-07 17:46:34 +030017#include <dm/device-internal.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070018#include <dm/devres.h>
19#include <dm/read.h>
Simon Glassc06c1be2020-05-10 11:40:08 -060020#include <linux/bug.h>
Lukasz Majewski9e38dc32019-06-24 15:50:42 +020021#include <linux/clk-provider.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070022#include <linux/err.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060023#include <asm/global_data.h>
Simon Glass36ad2342015-06-23 15:39:15 -060024
Mario Six799fe562018-01-15 11:06:51 +010025static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
Simon Glass36ad2342015-06-23 15:39:15 -060026{
Mario Six799fe562018-01-15 11:06:51 +010027 return (const struct clk_ops *)dev->driver->ops;
Simon Glass36ad2342015-06-23 15:39:15 -060028}
29
Simon Glass43033962020-07-19 10:15:56 -060030struct clk *dev_get_clk_ptr(struct udevice *dev)
31{
32 return (struct clk *)dev_get_uclass_priv(dev);
33}
34
Stephen Warrena9622432016-06-17 09:44:00 -060035#if CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glass589d9152016-07-04 11:58:03 -060036# if CONFIG_IS_ENABLED(OF_PLATDATA)
Walter Lozanodc5b4372020-06-25 01:10:13 -030037int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
38 struct clk *clk)
Simon Glass589d9152016-07-04 11:58:03 -060039{
40 int ret;
41
Simon Glass0000e0d2021-03-15 17:25:28 +130042 ret = device_get_by_ofplat_idx(cells->idx, &clk->dev);
Simon Glass589d9152016-07-04 11:58:03 -060043 if (ret)
44 return ret;
Walter Lozanodc5b4372020-06-25 01:10:13 -030045 clk->id = cells->arg[0];
Simon Glass589d9152016-07-04 11:58:03 -060046
47 return 0;
48}
49# else
Stephen Warrena9622432016-06-17 09:44:00 -060050static int clk_of_xlate_default(struct clk *clk,
Simon Glassb7ae2772017-05-18 20:09:40 -060051 struct ofnode_phandle_args *args)
Simon Glass36ad2342015-06-23 15:39:15 -060052{
Stephen Warrena9622432016-06-17 09:44:00 -060053 debug("%s(clk=%p)\n", __func__, clk);
Simon Glass36ad2342015-06-23 15:39:15 -060054
Stephen Warrena9622432016-06-17 09:44:00 -060055 if (args->args_count > 1) {
56 debug("Invaild args_count: %d\n", args->args_count);
57 return -EINVAL;
58 }
Simon Glass36ad2342015-06-23 15:39:15 -060059
Stephen Warrena9622432016-06-17 09:44:00 -060060 if (args->args_count)
61 clk->id = args->args[0];
62 else
63 clk->id = 0;
Simon Glass36ad2342015-06-23 15:39:15 -060064
Sekhar Nori3d23abd2019-07-11 14:30:24 +053065 clk->data = 0;
66
Stephen Warrena9622432016-06-17 09:44:00 -060067 return 0;
Simon Glass36ad2342015-06-23 15:39:15 -060068}
Simon Glass0342bd22016-01-20 19:43:02 -070069
Jagan Tekifc7c7ce2019-02-28 00:26:52 +053070static int clk_get_by_index_tail(int ret, ofnode node,
71 struct ofnode_phandle_args *args,
72 const char *list_name, int index,
73 struct clk *clk)
74{
75 struct udevice *dev_clk;
76 const struct clk_ops *ops;
77
78 assert(clk);
79 clk->dev = NULL;
80 if (ret)
81 goto err;
82
83 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
84 if (ret) {
85 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
86 __func__, ret);
Simon Glassf73f5812021-01-21 13:57:11 -070087 return log_msg_ret("get", ret);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +053088 }
89
90 clk->dev = dev_clk;
91
92 ops = clk_dev_ops(dev_clk);
93
94 if (ops->of_xlate)
95 ret = ops->of_xlate(clk, args);
96 else
97 ret = clk_of_xlate_default(clk, args);
98 if (ret) {
99 debug("of_xlate() failed: %d\n", ret);
Simon Glassf73f5812021-01-21 13:57:11 -0700100 return log_msg_ret("xlate", ret);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530101 }
102
103 return clk_request(dev_clk, clk);
104err:
105 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
106 __func__, ofnode_get_name(node), list_name, index, ret);
Simon Glassf73f5812021-01-21 13:57:11 -0700107
108 return log_msg_ret("prop", ret);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530109}
110
Philipp Tomsichf7604342018-01-08 11:18:18 +0100111static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
112 int index, struct clk *clk)
Simon Glass0342bd22016-01-20 19:43:02 -0700113{
Simon Glass0342bd22016-01-20 19:43:02 -0700114 int ret;
Simon Glass2558bff2017-05-30 21:47:29 -0600115 struct ofnode_phandle_args args;
Simon Glass0342bd22016-01-20 19:43:02 -0700116
Stephen Warrena9622432016-06-17 09:44:00 -0600117 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
118
119 assert(clk);
Patrice Chotard96fc03d2017-07-18 11:57:07 +0200120 clk->dev = NULL;
121
Philipp Tomsichf7604342018-01-08 11:18:18 +0100122 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
Mario Six799fe562018-01-15 11:06:51 +0100123 index, &args);
Simon Glass0342bd22016-01-20 19:43:02 -0700124 if (ret) {
125 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
126 __func__, ret);
Simon Glassf73f5812021-01-21 13:57:11 -0700127 return log_ret(ret);
Simon Glass0342bd22016-01-20 19:43:02 -0700128 }
129
Stephen Warrena9622432016-06-17 09:44:00 -0600130
Jagan Tekia77add32019-02-28 00:26:53 +0530131 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400132 index, clk);
Stephen Warrena9622432016-06-17 09:44:00 -0600133}
Philipp Tomsichf7604342018-01-08 11:18:18 +0100134
135int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
136{
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530137 struct ofnode_phandle_args args;
138 int ret;
139
140 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
141 index, &args);
142
143 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400144 index, clk);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530145}
146
147int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
148{
149 struct ofnode_phandle_args args;
150 int ret;
151
152 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400153 index, &args);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530154
155 return clk_get_by_index_tail(ret, node, &args, "clocks",
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400156 index, clk);
Philipp Tomsichf7604342018-01-08 11:18:18 +0100157}
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100158
Neil Armstrong8a275a02018-04-03 11:44:18 +0200159int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
160{
161 int i, ret, err, count;
162
163 bulk->count = 0;
164
Patrick Delaunayd776a842020-09-25 09:41:14 +0200165 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0);
Neil Armstrong52b26d92018-04-17 11:30:31 +0200166 if (count < 1)
167 return count;
Neil Armstrong8a275a02018-04-03 11:44:18 +0200168
169 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
170 if (!bulk->clks)
171 return -ENOMEM;
172
173 for (i = 0; i < count; i++) {
174 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
175 if (ret < 0)
176 goto bulk_get_err;
177
178 ++bulk->count;
179 }
180
181 return 0;
182
183bulk_get_err:
184 err = clk_release_all(bulk->clks, bulk->count);
185 if (err)
186 debug("%s: could release all clocks for %p\n",
187 __func__, dev);
188
189 return ret;
190}
191
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300192static struct clk *clk_set_default_get_by_id(struct clk *clk)
193{
194 struct clk *c = clk;
195
196 if (CONFIG_IS_ENABLED(CLK_CCF)) {
197 int ret = clk_get_by_id(clk->id, &c);
198
199 if (ret) {
200 debug("%s(): could not get parent clock pointer, id %lu\n",
201 __func__, clk->id);
202 ERR_PTR(ret);
203 }
204 }
205
206 return c;
207}
208
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200209static int clk_set_default_parents(struct udevice *dev, int stage)
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100210{
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300211 struct clk clk, parent_clk, *c, *p;
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100212 int index;
213 int num_parents;
214 int ret;
215
216 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
Patrick Delaunayd776a842020-09-25 09:41:14 +0200217 "#clock-cells", 0);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100218 if (num_parents < 0) {
219 debug("%s: could not read assigned-clock-parents for %p\n",
220 __func__, dev);
221 return 0;
222 }
223
224 for (index = 0; index < num_parents; index++) {
225 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
226 index, &parent_clk);
Neil Armstrongf3cc6312018-07-26 15:19:32 +0200227 /* If -ENOENT, this is a no-op entry */
228 if (ret == -ENOENT)
229 continue;
230
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100231 if (ret) {
232 debug("%s: could not get parent clock %d for %s\n",
233 __func__, index, dev_read_name(dev));
234 return ret;
235 }
236
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300237 p = clk_set_default_get_by_id(&parent_clk);
238 if (IS_ERR(p))
239 return PTR_ERR(p);
240
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100241 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
242 index, &clk);
243 if (ret) {
244 debug("%s: could not get assigned clock %d for %s\n",
245 __func__, index, dev_read_name(dev));
246 return ret;
247 }
248
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200249 /* This is clk provider device trying to reparent itself
250 * It cannot be done right now but need to wait after the
251 * device is probed
252 */
253 if (stage == 0 && clk.dev == dev)
254 continue;
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100255
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200256 if (stage > 0 && clk.dev != dev)
257 /* do not setup twice the parent clocks */
258 continue;
259
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300260 c = clk_set_default_get_by_id(&clk);
261 if (IS_ERR(c))
262 return PTR_ERR(c);
263
264 ret = clk_set_parent(c, p);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100265 /*
266 * Not all drivers may support clock-reparenting (as of now).
267 * Ignore errors due to this.
268 */
269 if (ret == -ENOSYS)
270 continue;
271
Jean-Jacques Hiblotb2320812019-09-26 15:42:42 +0200272 if (ret < 0) {
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100273 debug("%s: failed to reparent clock %d for %s\n",
274 __func__, index, dev_read_name(dev));
275 return ret;
276 }
277 }
278
279 return 0;
280}
281
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200282static int clk_set_default_rates(struct udevice *dev, int stage)
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100283{
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300284 struct clk clk, *c;
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100285 int index;
286 int num_rates;
287 int size;
288 int ret = 0;
289 u32 *rates = NULL;
290
291 size = dev_read_size(dev, "assigned-clock-rates");
292 if (size < 0)
293 return 0;
294
295 num_rates = size / sizeof(u32);
296 rates = calloc(num_rates, sizeof(u32));
297 if (!rates)
298 return -ENOMEM;
299
300 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
301 if (ret)
302 goto fail;
303
304 for (index = 0; index < num_rates; index++) {
Neil Armstrongf3cc6312018-07-26 15:19:32 +0200305 /* If 0 is passed, this is a no-op */
306 if (!rates[index])
307 continue;
308
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100309 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
310 index, &clk);
311 if (ret) {
312 debug("%s: could not get assigned clock %d for %s\n",
313 __func__, index, dev_read_name(dev));
314 continue;
315 }
316
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200317 /* This is clk provider device trying to program itself
318 * It cannot be done right now but need to wait after the
319 * device is probed
320 */
321 if (stage == 0 && clk.dev == dev)
322 continue;
323
324 if (stage > 0 && clk.dev != dev)
325 /* do not setup twice the parent clocks */
326 continue;
327
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300328 c = clk_set_default_get_by_id(&clk);
329 if (IS_ERR(c))
330 return PTR_ERR(c);
331
332 ret = clk_set_rate(c, rates[index]);
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200333
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100334 if (ret < 0) {
Simon Glass33363732019-01-21 14:53:19 -0700335 debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
336 __func__, index, clk.id, dev_read_name(dev));
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100337 break;
338 }
339 }
340
341fail:
342 free(rates);
343 return ret;
344}
345
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200346int clk_set_defaults(struct udevice *dev, int stage)
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100347{
348 int ret;
349
Simon Glassf1d50f72020-12-19 10:40:13 -0700350 if (!dev_has_ofnode(dev))
Peng Fan40ec4e42019-07-31 07:01:49 +0000351 return 0;
352
Philipp Tomsiche546ec82018-11-26 20:20:19 +0100353 /* If this not in SPL and pre-reloc state, don't take any action. */
354 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
355 return 0;
356
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100357 debug("%s(%s)\n", __func__, dev_read_name(dev));
358
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200359 ret = clk_set_default_parents(dev, stage);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100360 if (ret)
361 return ret;
362
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200363 ret = clk_set_default_rates(dev, stage);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100364 if (ret < 0)
365 return ret;
366
367 return 0;
368}
Stephen Warrena9622432016-06-17 09:44:00 -0600369
370int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
371{
372 int index;
373
374 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
Patrice Chotard96fc03d2017-07-18 11:57:07 +0200375 clk->dev = NULL;
Stephen Warrena9622432016-06-17 09:44:00 -0600376
Simon Glass2558bff2017-05-30 21:47:29 -0600377 index = dev_read_stringlist_search(dev, "clock-names", name);
Stephen Warrena9622432016-06-17 09:44:00 -0600378 if (index < 0) {
Simon Glassb0ea7402016-10-02 17:59:28 -0600379 debug("fdt_stringlist_search() failed: %d\n", index);
Stephen Warrena9622432016-06-17 09:44:00 -0600380 return index;
381 }
382
383 return clk_get_by_index(dev, index, clk);
Simon Glass0342bd22016-01-20 19:43:02 -0700384}
Giulio Benetti6c910872019-12-12 23:53:19 +0100385# endif /* OF_PLATDATA */
Patrice Chotardcafc3412017-07-25 13:24:45 +0200386
developerbdc786d2020-01-09 11:35:07 +0800387int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
388{
389 int index;
390
391 debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
392 ofnode_get_name(node), name, clk);
393 clk->dev = NULL;
394
395 index = ofnode_stringlist_search(node, "clock-names", name);
396 if (index < 0) {
397 debug("fdt_stringlist_search() failed: %d\n", index);
398 return index;
399 }
400
401 return clk_get_by_index_nodev(node, index, clk);
402}
403
404int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
405{
406 int ret;
407
408 ret = clk_get_by_name_nodev(node, name, clk);
409 if (ret == -ENODATA)
410 return 0;
411
412 return ret;
413}
414
Patrice Chotardcafc3412017-07-25 13:24:45 +0200415int clk_release_all(struct clk *clk, int count)
416{
417 int i, ret;
418
419 for (i = 0; i < count; i++) {
420 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
421
422 /* check if clock has been previously requested */
423 if (!clk[i].dev)
424 continue;
425
426 ret = clk_disable(&clk[i]);
427 if (ret && ret != -ENOSYS)
428 return ret;
429
430 ret = clk_free(&clk[i]);
431 if (ret && ret != -ENOSYS)
432 return ret;
433 }
434
435 return 0;
436}
437
Simon Glass589d9152016-07-04 11:58:03 -0600438#endif /* OF_CONTROL */
Stephen Warrena9622432016-06-17 09:44:00 -0600439
440int clk_request(struct udevice *dev, struct clk *clk)
441{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200442 const struct clk_ops *ops;
Stephen Warrena9622432016-06-17 09:44:00 -0600443
444 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200445 if (!clk)
446 return 0;
447 ops = clk_dev_ops(dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600448
449 clk->dev = dev;
450
451 if (!ops->request)
452 return 0;
453
454 return ops->request(clk);
455}
456
457int clk_free(struct clk *clk)
458{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200459 const struct clk_ops *ops;
Stephen Warrena9622432016-06-17 09:44:00 -0600460
461 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800462 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200463 return 0;
464 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600465
Simon Glass2cdd3f42020-02-03 07:35:54 -0700466 if (!ops->rfree)
Stephen Warrena9622432016-06-17 09:44:00 -0600467 return 0;
468
Simon Glass2cdd3f42020-02-03 07:35:54 -0700469 return ops->rfree(clk);
Stephen Warrena9622432016-06-17 09:44:00 -0600470}
471
472ulong clk_get_rate(struct clk *clk)
473{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200474 const struct clk_ops *ops;
Simon Glassf73f5812021-01-21 13:57:11 -0700475 int ret;
Stephen Warrena9622432016-06-17 09:44:00 -0600476
477 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800478 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200479 return 0;
480 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600481
482 if (!ops->get_rate)
483 return -ENOSYS;
484
Simon Glassf73f5812021-01-21 13:57:11 -0700485 ret = ops->get_rate(clk);
486 if (ret)
487 return log_ret(ret);
488
489 return 0;
Stephen Warrena9622432016-06-17 09:44:00 -0600490}
491
Lukasz Majewski9e38dc32019-06-24 15:50:42 +0200492struct clk *clk_get_parent(struct clk *clk)
493{
494 struct udevice *pdev;
495 struct clk *pclk;
496
497 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800498 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200499 return NULL;
Lukasz Majewski9e38dc32019-06-24 15:50:42 +0200500
501 pdev = dev_get_parent(clk->dev);
502 pclk = dev_get_clk_ptr(pdev);
503 if (!pclk)
504 return ERR_PTR(-ENODEV);
505
506 return pclk;
507}
508
Lukasz Majewski53155da2019-06-24 15:50:43 +0200509long long clk_get_parent_rate(struct clk *clk)
510{
511 const struct clk_ops *ops;
512 struct clk *pclk;
513
514 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800515 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200516 return 0;
Lukasz Majewski53155da2019-06-24 15:50:43 +0200517
518 pclk = clk_get_parent(clk);
519 if (IS_ERR(pclk))
520 return -ENODEV;
521
522 ops = clk_dev_ops(pclk->dev);
523 if (!ops->get_rate)
524 return -ENOSYS;
525
Lukasz Majewski4ef32172019-06-24 15:50:46 +0200526 /* Read the 'rate' if not already set or if proper flag set*/
527 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
Lukasz Majewski53155da2019-06-24 15:50:43 +0200528 pclk->rate = clk_get_rate(pclk);
529
530 return pclk->rate;
531}
532
Dario Binacchib7f85892020-12-30 00:06:31 +0100533ulong clk_round_rate(struct clk *clk, ulong rate)
534{
535 const struct clk_ops *ops;
536
537 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
538 if (!clk_valid(clk))
539 return 0;
540
541 ops = clk_dev_ops(clk->dev);
542 if (!ops->round_rate)
543 return -ENOSYS;
544
545 return ops->round_rate(clk, rate);
546}
547
Stephen Warrena9622432016-06-17 09:44:00 -0600548ulong clk_set_rate(struct clk *clk, ulong rate)
549{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200550 const struct clk_ops *ops;
Stephen Warrena9622432016-06-17 09:44:00 -0600551
552 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
developerdc338d32020-01-09 11:35:06 +0800553 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200554 return 0;
555 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600556
557 if (!ops->set_rate)
558 return -ENOSYS;
559
560 return ops->set_rate(clk, rate);
561}
562
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100563int clk_set_parent(struct clk *clk, struct clk *parent)
564{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200565 const struct clk_ops *ops;
Claudiu Bezneac8c16002020-09-07 17:46:34 +0300566 int ret;
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100567
568 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
developerdc338d32020-01-09 11:35:06 +0800569 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200570 return 0;
571 ops = clk_dev_ops(clk->dev);
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100572
573 if (!ops->set_parent)
574 return -ENOSYS;
575
Claudiu Bezneac8c16002020-09-07 17:46:34 +0300576 ret = ops->set_parent(clk, parent);
577 if (ret)
578 return ret;
579
580 if (CONFIG_IS_ENABLED(CLK_CCF))
581 ret = device_reparent(clk->dev, parent->dev);
582
583 return ret;
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100584}
585
Stephen Warrena9622432016-06-17 09:44:00 -0600586int clk_enable(struct clk *clk)
587{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200588 const struct clk_ops *ops;
Peng Fan82628e22019-08-21 13:35:09 +0000589 struct clk *clkp = NULL;
590 int ret;
Stephen Warrena9622432016-06-17 09:44:00 -0600591
592 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800593 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200594 return 0;
595 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600596
Peng Fan82628e22019-08-21 13:35:09 +0000597 if (CONFIG_IS_ENABLED(CLK_CCF)) {
598 /* Take id 0 as a non-valid clk, such as dummy */
599 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
600 if (clkp->enable_count) {
601 clkp->enable_count++;
602 return 0;
603 }
604 if (clkp->dev->parent &&
605 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
606 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
607 if (ret) {
608 printf("Enable %s failed\n",
609 clkp->dev->parent->name);
610 return ret;
611 }
612 }
613 }
Stephen Warrena9622432016-06-17 09:44:00 -0600614
Peng Fan82628e22019-08-21 13:35:09 +0000615 if (ops->enable) {
616 ret = ops->enable(clk);
617 if (ret) {
618 printf("Enable %s failed\n", clk->dev->name);
619 return ret;
620 }
621 }
622 if (clkp)
623 clkp->enable_count++;
624 } else {
625 if (!ops->enable)
626 return -ENOSYS;
627 return ops->enable(clk);
628 }
629
630 return 0;
Stephen Warrena9622432016-06-17 09:44:00 -0600631}
632
Neil Armstrong8a275a02018-04-03 11:44:18 +0200633int clk_enable_bulk(struct clk_bulk *bulk)
634{
635 int i, ret;
636
637 for (i = 0; i < bulk->count; i++) {
638 ret = clk_enable(&bulk->clks[i]);
639 if (ret < 0 && ret != -ENOSYS)
640 return ret;
641 }
642
643 return 0;
644}
645
Stephen Warrena9622432016-06-17 09:44:00 -0600646int clk_disable(struct clk *clk)
647{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200648 const struct clk_ops *ops;
Peng Fan82628e22019-08-21 13:35:09 +0000649 struct clk *clkp = NULL;
650 int ret;
Stephen Warrena9622432016-06-17 09:44:00 -0600651
652 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800653 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200654 return 0;
655 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600656
Peng Fan82628e22019-08-21 13:35:09 +0000657 if (CONFIG_IS_ENABLED(CLK_CCF)) {
658 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
Claudiu Bezneab02e8dd2020-09-07 17:46:35 +0300659 if (clkp->flags & CLK_IS_CRITICAL)
660 return 0;
661
Peng Fan82628e22019-08-21 13:35:09 +0000662 if (clkp->enable_count == 0) {
663 printf("clk %s already disabled\n",
664 clkp->dev->name);
665 return 0;
666 }
Stephen Warrena9622432016-06-17 09:44:00 -0600667
Peng Fan82628e22019-08-21 13:35:09 +0000668 if (--clkp->enable_count > 0)
669 return 0;
670 }
671
672 if (ops->disable) {
673 ret = ops->disable(clk);
674 if (ret)
675 return ret;
676 }
677
678 if (clkp && clkp->dev->parent &&
679 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
680 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
681 if (ret) {
682 printf("Disable %s failed\n",
683 clkp->dev->parent->name);
684 return ret;
685 }
686 }
687 } else {
688 if (!ops->disable)
689 return -ENOSYS;
690
691 return ops->disable(clk);
692 }
693
694 return 0;
Stephen Warrena9622432016-06-17 09:44:00 -0600695}
Simon Glass36ad2342015-06-23 15:39:15 -0600696
Neil Armstrong8a275a02018-04-03 11:44:18 +0200697int clk_disable_bulk(struct clk_bulk *bulk)
698{
699 int i, ret;
700
701 for (i = 0; i < bulk->count; i++) {
702 ret = clk_disable(&bulk->clks[i]);
703 if (ret < 0 && ret != -ENOSYS)
704 return ret;
705 }
706
707 return 0;
708}
709
Lukasz Majewski12014be2019-06-24 15:50:44 +0200710int clk_get_by_id(ulong id, struct clk **clkp)
711{
712 struct udevice *dev;
713 struct uclass *uc;
714 int ret;
715
716 ret = uclass_get(UCLASS_CLK, &uc);
717 if (ret)
718 return ret;
719
720 uclass_foreach_dev(dev, uc) {
721 struct clk *clk = dev_get_clk_ptr(dev);
722
723 if (clk && clk->id == id) {
724 *clkp = clk;
725 return 0;
726 }
727 }
728
729 return -ENOENT;
730}
731
Sekhar Noricf3119d2019-08-01 19:12:55 +0530732bool clk_is_match(const struct clk *p, const struct clk *q)
733{
734 /* trivial case: identical struct clk's or both NULL */
735 if (p == q)
736 return true;
737
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200738 /* trivial case #2: on the clk pointer is NULL */
739 if (!p || !q)
740 return false;
741
Sekhar Noricf3119d2019-08-01 19:12:55 +0530742 /* same device, id and data */
743 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
744 return true;
745
746 return false;
747}
748
Jean-Jacques Hiblot6e66b2d2019-10-22 14:00:04 +0200749static void devm_clk_release(struct udevice *dev, void *res)
750{
751 clk_free(res);
752}
753
754static int devm_clk_match(struct udevice *dev, void *res, void *data)
755{
756 return res == data;
757}
758
759struct clk *devm_clk_get(struct udevice *dev, const char *id)
760{
761 int rc;
762 struct clk *clk;
763
764 clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
765 if (unlikely(!clk))
766 return ERR_PTR(-ENOMEM);
767
768 rc = clk_get_by_name(dev, id, clk);
769 if (rc)
770 return ERR_PTR(rc);
771
772 devres_add(dev, clk);
773 return clk;
774}
775
776struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
777{
778 struct clk *clk = devm_clk_get(dev, id);
779
developer5e108fb2020-01-09 11:35:05 +0800780 if (PTR_ERR(clk) == -ENODATA)
Jean-Jacques Hiblot6e66b2d2019-10-22 14:00:04 +0200781 return NULL;
782
783 return clk;
784}
785
786void devm_clk_put(struct udevice *dev, struct clk *clk)
787{
788 int rc;
789
790 if (!clk)
791 return;
792
793 rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
794 WARN_ON(rc);
795}
796
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200797int clk_uclass_post_probe(struct udevice *dev)
798{
799 /*
800 * when a clock provider is probed. Call clk_set_defaults()
801 * also after the device is probed. This takes care of cases
802 * where the DT is used to setup default parents and rates
803 * using assigned-clocks
804 */
805 clk_set_defaults(dev, 1);
806
807 return 0;
808}
809
Simon Glass36ad2342015-06-23 15:39:15 -0600810UCLASS_DRIVER(clk) = {
811 .id = UCLASS_CLK,
812 .name = "clk",
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200813 .post_probe = clk_uclass_post_probe,
Simon Glass36ad2342015-06-23 15:39:15 -0600814};