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git01.mediatek.com / filogic / uboot / f0b97dcb7f25d536212c136940d31e9d7071a536 / . / configs / ls1021atwr_nor_SECURE_BOOT_defconfig
blob: 628e1d475e5a6dd9bfee0ab7e24a7b444287b9a2 [file] [log] [blame]
Ruchika Gupta10be7d42014-10-07 15:48:47 +0530[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=12500000
Ruchika Gupta10be7d42014-10-07 15:48:47 +0530[diff] [blame]4CONFIG_TARGET_LS1021ATWR=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x60100000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]6CONFIG_SYS_MALLOC_LEN=0x1020000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]8CONFIG_ENV_SIZE=0x20000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]9CONFIG_NXP_ESBC=y
Tom Rini1a195882021-08-18 23:12:33 -0400[diff] [blame]10CONFIG_SYS_I2C_MXC_I2C1=y
11CONFIG_SYS_I2C_MXC_I2C2=y
12CONFIG_SYS_I2C_MXC_I2C3=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]13CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]14CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]15CONFIG_SYS_LOAD_ADDR=0x82000000
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]16CONFIG_AHCI=y
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]17CONFIG_SYS_MEMTEST_START=0x80000000
18CONFIG_SYS_MEMTEST_END=0x9fffffff
Tom Rinie791a022017-08-11 11:20:19 -0400[diff] [blame]19CONFIG_DISTRO_DEFAULTS=y
Simon Glassd9b4d052016-02-22 22:55:41 -0700[diff] [blame]20# CONFIG_SYS_MALLOC_F is not set
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]21CONFIG_FIT=y
22CONFIG_FIT_VERBOSE=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]23CONFIG_OF_BOARD_SETUP=y
24CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]25CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]26CONFIG_USE_BOOTARGS=y
27CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]28CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;"
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]29CONFIG_SILENT_CONSOLE=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]30CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]31CONFIG_MISC_INIT_R=y
Tom Rini4abdf142021-08-17 17:59:41 -0400[diff] [blame]32CONFIG_ID_EEPROM=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]33CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]34CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]35CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]36CONFIG_CMD_MEMINFO=y
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]37CONFIG_CMD_MEMTEST=y
Biwen Liad6786d2021-02-05 19:02:07 +0800[diff] [blame]38CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]39CONFIG_CMD_GPT=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]40CONFIG_CMD_I2C=y
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]41CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]42CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]43# CONFIG_CMD_SETEXPR is not set
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]44CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]45CONFIG_ENV_OVERWRITE=y
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]46CONFIG_USE_ETHPRIME=y
47CONFIG_ETHPRIME="ethernet@2d10000"
Simon Glassd9b4d052016-02-22 22:55:41 -0700[diff] [blame]48CONFIG_DM=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]49CONFIG_SATA=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]50CONFIG_SATA_CEVA=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]51CONFIG_MPC8XXX_GPIO=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]52CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]53CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]54CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]55CONFIG_SYS_I2C_EEPROM_ADDR=0x53
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]56CONFIG_FSL_ESDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]57CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]58CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]59CONFIG_FLASH_CFI_DRIVER=y
Tom Rini18b76772022-02-25 11:19:52 -0500[diff] [blame]60CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]61CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
62CONFIG_SYS_FLASH_CFI=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]63CONFIG_PHY_ATHEROS=y
64CONFIG_DM_ETH=y
Vladimir Oltean940bf912020-07-16 18:09:09 +0800[diff] [blame]65CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]66CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]67CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]68CONFIG_MII=y
Mario Sixda4fc932018-03-28 14:38:18 +0200[diff] [blame]69CONFIG_TSEC_ENET=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]70CONFIG_NVME_PCI=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]71CONFIG_PCI=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]72CONFIG_PCIE_LAYERSCAPE_RC=y
Tom Rini95f833a2021-11-12 23:37:42 +0000[diff] [blame]73CONFIG_SYS_QE_FW_ADDR=0x60940000
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]74CONFIG_DM_SCSI=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]75CONFIG_SYS_NS16550=y
Masahiro Yamada58d00232016-06-04 07:35:03 +0900[diff] [blame]76CONFIG_USB=y
77CONFIG_USB_XHCI_HCD=y
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]78CONFIG_USB_XHCI_DWC3=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]79CONFIG_RSA=y
Simon Glass73ad4d02016-09-12 23:18:29 -0600[diff] [blame]80CONFIG_SPL_RSA=y