Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Configuation settings for the Motorola MC5272C3 board. |
| 4 | * |
| 5 | * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 6 | */ |
wdenk | abf7a7c | 2003-12-08 01:34:36 +0000 | [diff] [blame] | 7 | |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 8 | /* |
| 9 | * board/config.h - configuration options, board specific |
| 10 | */ |
wdenk | abf7a7c | 2003-12-08 01:34:36 +0000 | [diff] [blame] | 11 | |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 12 | #ifndef _M5272C3_H |
| 13 | #define _M5272C3_H |
| 14 | |
| 15 | /* |
| 16 | * High Level Configuration Options |
| 17 | * (easy to change) |
| 18 | */ |
wdenk | abf7a7c | 2003-12-08 01:34:36 +0000 | [diff] [blame] | 19 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 20 | #define CONFIG_SYS_UART_PORT (0) |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 21 | |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 22 | #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ |
| 23 | |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 24 | #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 25 | |
| 26 | /* Configuration for environment |
| 27 | * Environment is embedded in u-boot in the second sector of the flash |
| 28 | */ |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 29 | |
angelo@sysam.it | 6312a95 | 2015-03-29 22:54:16 +0200 | [diff] [blame] | 30 | #define LDS_BOARD_TEXT \ |
Simon Glass | 547cb40 | 2017-08-03 12:21:49 -0600 | [diff] [blame] | 31 | . = DEFINED(env_offset) ? env_offset : .; \ |
| 32 | env/embedded.o(.text); |
angelo@sysam.it | 6312a95 | 2015-03-29 22:54:16 +0200 | [diff] [blame] | 33 | |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 34 | #ifdef CONFIG_MCFFEC |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 35 | # define CONFIG_SYS_DISCOVER_PHY |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 36 | /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ |
| 37 | # ifndef CONFIG_SYS_DISCOVER_PHY |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 38 | # define FECDUPLEX FULL |
| 39 | # define FECSPEED _100BASET |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 40 | # endif /* CONFIG_SYS_DISCOVER_PHY */ |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 41 | #endif |
| 42 | |
| 43 | #ifdef CONFIG_MCFFEC |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 44 | # define CONFIG_IPADDR 192.162.1.2 |
| 45 | # define CONFIG_NETMASK 255.255.255.0 |
| 46 | # define CONFIG_SERVERIP 192.162.1.1 |
| 47 | # define CONFIG_GATEWAYIP 192.162.1.1 |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 48 | #endif /* CONFIG_MCFFEC */ |
| 49 | |
Mario Six | 790d844 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 50 | #define CONFIG_HOSTNAME "M5272C3" |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 51 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 52 | "netdev=eth0\0" \ |
| 53 | "loadaddr=10000\0" \ |
| 54 | "u-boot=u-boot.bin\0" \ |
| 55 | "load=tftp ${loadaddr) ${u-boot}\0" \ |
| 56 | "upd=run load; run prog\0" \ |
| 57 | "prog=prot off ffe00000 ffe3ffff;" \ |
| 58 | "era ffe00000 ffe3ffff;" \ |
| 59 | "cp.b ${loadaddr} ffe00000 ${filesize};"\ |
| 60 | "save\0" \ |
| 61 | "" |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 62 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 63 | #define CONFIG_SYS_CLK 66000000 |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 64 | |
| 65 | /* |
| 66 | * Low Level Configuration Settings |
| 67 | * (address mappings, register initial values, etc.) |
| 68 | * You should know what you are doing if you make changes here. |
| 69 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 70 | #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ |
| 71 | #define CONFIG_SYS_SCR 0x0003 |
| 72 | #define CONFIG_SYS_SPR 0xffff |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 73 | |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 74 | /*----------------------------------------------------------------------- |
| 75 | * Definitions for initial stack pointer and data area (in DPRAM) |
| 76 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 78 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 79 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 81 | |
| 82 | /*----------------------------------------------------------------------- |
| 83 | * Start addresses for the final memory configuration |
| 84 | * (Set up by the startup code) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 86 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 87 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 88 | #define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ |
| 89 | #define CONFIG_SYS_FLASH_BASE 0xffe00000 |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 90 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_MONITOR_LEN 0x20000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 92 | #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 93 | |
| 94 | /* |
| 95 | * For booting Linux, the board info and command line data |
| 96 | * have to be in the first 8 MB of memory, since this is |
| 97 | * the maximum mapped by the Linux kernel during initialization ?? |
| 98 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 100 | |
TsiChung Liew | 12b340a | 2008-10-21 14:19:26 +0000 | [diff] [blame] | 101 | /* |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 102 | * FLASH organization |
| 103 | */ |
TsiChung Liew | 12b340a | 2008-10-21 14:19:26 +0000 | [diff] [blame] | 104 | #ifdef CONFIG_SYS_FLASH_CFI |
TsiChung Liew | 12b340a | 2008-10-21 14:19:26 +0000 | [diff] [blame] | 105 | # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ |
| 106 | # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
TsiChung Liew | 12b340a | 2008-10-21 14:19:26 +0000 | [diff] [blame] | 107 | # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ |
TsiChung Liew | 12b340a | 2008-10-21 14:19:26 +0000 | [diff] [blame] | 108 | #endif |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 109 | |
| 110 | /*----------------------------------------------------------------------- |
| 111 | * Cache Configuration |
| 112 | */ |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 113 | |
TsiChung Liew | 0ee47d4 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 114 | #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 115 | CONFIG_SYS_INIT_RAM_SIZE - 8) |
TsiChung Liew | 0ee47d4 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 116 | #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 117 | CONFIG_SYS_INIT_RAM_SIZE - 4) |
TsiChung Liew | 0ee47d4 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 118 | #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) |
| 119 | #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ |
| 120 | CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ |
| 121 | CF_ACR_EN | CF_ACR_SM_ALL) |
| 122 | #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ |
| 123 | CF_CACR_DISD | CF_CACR_INVI | \ |
| 124 | CF_CACR_CEIB | CF_CACR_DCM | \ |
| 125 | CF_CACR_EUSP) |
| 126 | |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 127 | /*----------------------------------------------------------------------- |
wdenk | e65527f | 2004-02-12 00:47:09 +0000 | [diff] [blame] | 128 | * Port configuration |
| 129 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_PACNT 0x00000000 |
| 131 | #define CONFIG_SYS_PADDR 0x0000 |
| 132 | #define CONFIG_SYS_PADAT 0x0000 |
| 133 | #define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */ |
| 134 | #define CONFIG_SYS_PBDDR 0x0000 |
| 135 | #define CONFIG_SYS_PBDAT 0x0000 |
| 136 | #define CONFIG_SYS_PDCNT 0x00000000 |
TsiChungLiew | 1692b48 | 2007-08-15 20:32:06 -0500 | [diff] [blame] | 137 | #endif /* _M5272C3_H */ |