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git01.mediatek.com / filogic / uboot / f0476a128057727c63b66e36045478b0946aea89 / . / configs / socfpga_stratix10_defconfig
blob: 21014f9f8cdeedf9aace625e983be6828aa6bbd2 [file] [log] [blame]
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
3CONFIG_SYS_TEXT_BASE=0x1000
4CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]5CONFIG_ENV_SIZE=0x1000
6CONFIG_ENV_OFFSET=0x200
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]7CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]8CONFIG_DM_GPIO=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=2
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]10CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]11CONFIG_IDENT_STRING="socfpga_stratix10"
Tien Fong Chee6fd0a712019-01-23 14:20:03 +0800[diff] [blame]12CONFIG_SPL_FS_FAT=y
Simon Goldschmidtcc4078c2018-09-30 14:31:53 +0200[diff] [blame]13CONFIG_SPL_TEXT_BASE=0xFFE00000
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]14CONFIG_BOOTDELAY=5
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]15CONFIG_SPL_SPI_LOAD=y
16CONFIG_HUSH_PARSER=y
17CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
18CONFIG_CMD_MEMTEST=y
Ashok Reddy Soma41e8edf2020-05-04 15:26:21 +0200[diff] [blame]19CONFIG_SYS_MEMTEST_START=0x00000000
20CONFIG_SYS_MEMTEST_END=0x3fe00000
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]21# CONFIG_CMD_FLASH is not set
22CONFIG_CMD_GPIO=y
23CONFIG_CMD_I2C=y
24CONFIG_CMD_MMC=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]25CONFIG_CMD_SPI=y
26CONFIG_CMD_USB=y
27CONFIG_CMD_DHCP=y
28CONFIG_CMD_MII=y
29CONFIG_CMD_PING=y
30CONFIG_CMD_CACHE=y
31CONFIG_CMD_EXT4=y
32CONFIG_CMD_FAT=y
33CONFIG_CMD_FS_GENERIC=y
Dalon Westergreeneba49552018-09-11 17:25:00 -0700[diff] [blame]34CONFIG_OF_EMBED=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]35CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]36CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]37CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]38CONFIG_NET_RANDOM_ETHADDR=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]39CONFIG_SPL_DM_SEQ_ALIAS=y
Ley Foon Tan3fdf4362019-05-06 09:56:01 +0800[diff] [blame]40CONFIG_SPL_ALTERA_SDRAM=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]41CONFIG_DWAPB_GPIO=y
42CONFIG_DM_I2C=y
43CONFIG_SYS_I2C_DW=y
44CONFIG_DM_MMC=y
45CONFIG_MMC_DW=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]46CONFIG_MTD=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]47CONFIG_SF_DEFAULT_MODE=0x2003
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]48CONFIG_SPI_FLASH_SPANSION=y
49CONFIG_SPI_FLASH_STMICRO=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]50CONFIG_PHY_MICREL=y
51CONFIG_PHY_MICREL_KSZ90X1=y
52CONFIG_DM_ETH=y
53CONFIG_ETH_DESIGNWARE=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]54CONFIG_MII=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]55CONFIG_DM_RESET=y
56CONFIG_SPI=y
57CONFIG_CADENCE_QSPI=y
58CONFIG_DESIGNWARE_SPI=y
59CONFIG_USB=y
60CONFIG_DM_USB=y
61CONFIG_USB_DWC2=y
62CONFIG_USB_STORAGE=y
Marek Vasut40919d92019-06-27 00:26:34 +0200[diff] [blame]63CONFIG_DESIGNWARE_WATCHDOG=y
Marek Vasut8655f672019-06-27 01:19:23 +0200[diff] [blame]64CONFIG_WDT=y
65# CONFIG_SPL_USE_TINY_PRINTF is not set