| Simon Glass | 4ecaa6d | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013 Google, Inc |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <clk.h> |
| 9 | #include <dm.h> |
| 10 | #include <dwmmc.h> |
| 11 | #include <errno.h> |
| 12 | #include <syscon.h> |
| 13 | #include <asm/arch/clock.h> |
| 14 | #include <asm/arch/periph.h> |
| 15 | #include <linux/err.h> |
| 16 | |
| 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
| 19 | struct rockchip_dwmmc_priv { |
| 20 | struct udevice *clk; |
| 21 | struct rk3288_grf *grf; |
| 22 | struct dwmci_host host; |
| 23 | }; |
| 24 | |
| 25 | static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq) |
| 26 | { |
| 27 | struct udevice *dev = host->priv; |
| 28 | struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); |
| 29 | int ret; |
| 30 | |
| 31 | ret = clk_set_periph_rate(priv->clk, PERIPH_ID_SDMMC0 + host->dev_index, |
| 32 | freq); |
| 33 | if (ret < 0) { |
| 34 | debug("%s: err=%d\n", __func__, ret); |
| 35 | return ret; |
| 36 | } |
| 37 | |
| 38 | return freq; |
| 39 | } |
| 40 | |
| 41 | static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev) |
| 42 | { |
| 43 | struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); |
| 44 | struct dwmci_host *host = &priv->host; |
| 45 | |
| 46 | host->name = dev->name; |
| 47 | host->ioaddr = (void *)dev_get_addr(dev); |
| 48 | host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
| 49 | "bus-width", 4); |
| 50 | host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk; |
| 51 | host->priv = dev; |
| 52 | |
| 53 | /* TODO(sjg@chromium.org): Remove the need for this hack */ |
| 54 | host->dev_index = (ulong)host->ioaddr == 0xff0f0000 ? 0 : 1; |
| 55 | |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | static int rockchip_dwmmc_probe(struct udevice *dev) |
| 60 | { |
| 61 | struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); |
| 62 | struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); |
| 63 | struct dwmci_host *host = &priv->host; |
| 64 | u32 minmax[2]; |
| 65 | int ret; |
| 66 | |
| 67 | priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); |
| 68 | if (IS_ERR(priv->grf)) |
| 69 | return PTR_ERR(priv->grf); |
| 70 | ret = uclass_get_device(UCLASS_CLK, CLK_GENERAL, &priv->clk); |
| 71 | if (ret) |
| 72 | return ret; |
| 73 | |
| 74 | ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, |
| 75 | "clock-freq-min-max", minmax, 2); |
| 76 | if (!ret) |
| 77 | ret = add_dwmci(host, minmax[1], minmax[0]); |
| 78 | if (ret) |
| 79 | return ret; |
| 80 | |
| 81 | upriv->mmc = host->mmc; |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
| 86 | static const struct udevice_id rockchip_dwmmc_ids[] = { |
| 87 | { .compatible = "rockchip,rk3288-dw-mshc" }, |
| 88 | { } |
| 89 | }; |
| 90 | |
| 91 | U_BOOT_DRIVER(rockchip_dwmmc_drv) = { |
| 92 | .name = "rockchip_dwmmc", |
| 93 | .id = UCLASS_MMC, |
| 94 | .of_match = rockchip_dwmmc_ids, |
| 95 | .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata, |
| 96 | .probe = rockchip_dwmmc_probe, |
| 97 | .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv), |
| 98 | }; |