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Stefan Roese115802d2018-08-16 15:27:31 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2018 Stefan Roese <sr@denx.de>
4 */
5
6#ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
7#define __CONFIG_GARDENA_SMART_GATEWAY_H
8
Stefan Roese115802d2018-08-16 15:27:31 +02009/* RAM */
10#define CONFIG_SYS_SDRAM_BASE 0x80000000
11
Stefan Roese115802d2018-08-16 15:27:31 +020012#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
13
developer9720bc32020-04-21 09:28:48 +020014/* SPL */
Stefan Roese115802d2018-08-16 15:27:31 +020015
Simon Glass72cc5382022-10-20 18:22:39 -060016#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE
developer9720bc32020-04-21 09:28:48 +020017
18/* Dummy value */
19#define CONFIG_SYS_UBOOT_BASE 0
20
21/* Serial SPL */
Simon Glassf4d60392021-08-08 12:20:12 -060022#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
developer9720bc32020-04-21 09:28:48 +020023#define CONFIG_SYS_NS16550_MEM32
24#define CONFIG_SYS_NS16550_CLK 40000000
25#define CONFIG_SYS_NS16550_REG_SIZE -4
26#define CONFIG_SYS_NS16550_COM1 0xb0000c00
developer9720bc32020-04-21 09:28:48 +020027#endif
28
Stefan Roese115802d2018-08-16 15:27:31 +020029/* UART */
30#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
developere1693432019-09-25 17:45:42 +080031 230400, 460800, 921600 }
Stefan Roese115802d2018-08-16 15:27:31 +020032
33/* RAM */
Stefan Roese115802d2018-08-16 15:27:31 +020034
Stefan Roese115802d2018-08-16 15:27:31 +020035/* Environment settings */
Stefan Roese115802d2018-08-16 15:27:31 +020036
Stefan Roese115802d2018-08-16 15:27:31 +020037#endif /* __CONFIG_GARDENA_SMART_GATEWAY_H */