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Marek Vasut442c0f12018-08-18 15:58:32 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Designware APB Timer driver
4 *
5 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
6 */
7
Marek Vasut442c0f12018-08-18 15:58:32 +02008#include <dm.h>
9#include <clk.h>
Johan Jonker03872982022-04-09 18:55:06 +020010#include <dt-structs.h>
Simon Glass9bc15642020-02-03 07:36:16 -070011#include <malloc.h>
Simon Goldschmidt0b6b82a2019-10-23 22:23:12 +020012#include <reset.h>
Marek Vasut442c0f12018-08-18 15:58:32 +020013#include <timer.h>
Simon Glass9bc15642020-02-03 07:36:16 -070014#include <dm/device_compat.h>
Marek Vasut442c0f12018-08-18 15:58:32 +020015
16#include <asm/io.h>
17#include <asm/arch/timer.h>
18
19#define DW_APB_LOAD_VAL 0x0
20#define DW_APB_CURR_VAL 0x4
21#define DW_APB_CTRL 0x8
22
Marek Vasut442c0f12018-08-18 15:58:32 +020023struct dw_apb_timer_priv {
Johan Jonker16427632023-03-13 01:29:47 +010024 uintptr_t regs;
Simon Goldschmidt0b6b82a2019-10-23 22:23:12 +020025 struct reset_ctl_bulk resets;
Marek Vasut442c0f12018-08-18 15:58:32 +020026};
27
Johan Jonker03872982022-04-09 18:55:06 +020028struct dw_apb_timer_plat {
29#if CONFIG_IS_ENABLED(OF_PLATDATA)
30 struct dtd_snps_dw_apb_timer dtplat;
31#endif
32};
33
Sean Anderson947fc2d2020-10-07 14:37:44 -040034static u64 dw_apb_timer_get_count(struct udevice *dev)
Marek Vasut442c0f12018-08-18 15:58:32 +020035{
36 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
37
38 /*
39 * The DW APB counter counts down, but this function
40 * requires the count to be incrementing. Invert the
41 * result.
42 */
Sean Anderson947fc2d2020-10-07 14:37:44 -040043 return timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
Marek Vasut442c0f12018-08-18 15:58:32 +020044}
45
46static int dw_apb_timer_probe(struct udevice *dev)
47{
48 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
49 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
50 struct clk clk;
51 int ret;
Johan Jonker03872982022-04-09 18:55:06 +020052#if CONFIG_IS_ENABLED(OF_PLATDATA)
53 struct dw_apb_timer_plat *plat = dev_get_plat(dev);
54 struct dtd_snps_dw_apb_timer *dtplat = &plat->dtplat;
Marek Vasut442c0f12018-08-18 15:58:32 +020055
Johan Jonker03872982022-04-09 18:55:06 +020056 priv->regs = dtplat->reg[0];
Simon Goldschmidt0b6b82a2019-10-23 22:23:12 +020057
Johan Jonker03872982022-04-09 18:55:06 +020058 ret = clk_get_by_phandle(dev, &dtplat->clocks[0], &clk);
59 if (ret < 0)
Marek Vasut442c0f12018-08-18 15:58:32 +020060 return ret;
61
Johan Jonker03872982022-04-09 18:55:06 +020062 uc_priv->clock_rate = dtplat->clock_frequency;
63#endif
64 if (CONFIG_IS_ENABLED(OF_REAL)) {
65 ret = reset_get_bulk(dev, &priv->resets);
66 if (ret)
67 dev_warn(dev, "Can't get reset: %d\n", ret);
68 else
69 reset_deassert_bulk(&priv->resets);
Marek Vasut442c0f12018-08-18 15:58:32 +020070
Johan Jonker03872982022-04-09 18:55:06 +020071 ret = clk_get_by_index(dev, 0, &clk);
72 if (ret)
73 return ret;
74
75 uc_priv->clock_rate = clk_get_rate(&clk);
Johan Jonker03872982022-04-09 18:55:06 +020076 }
Marek Vasut442c0f12018-08-18 15:58:32 +020077
78 /* init timer */
79 writel(0xffffffff, priv->regs + DW_APB_LOAD_VAL);
80 writel(0xffffffff, priv->regs + DW_APB_CURR_VAL);
81 setbits_le32(priv->regs + DW_APB_CTRL, 0x3);
82
83 return 0;
84}
85
Simon Glassaad29ae2020-12-03 16:55:21 -070086static int dw_apb_timer_of_to_plat(struct udevice *dev)
Marek Vasut442c0f12018-08-18 15:58:32 +020087{
Johan Jonker03872982022-04-09 18:55:06 +020088 if (CONFIG_IS_ENABLED(OF_REAL)) {
89 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
Marek Vasut442c0f12018-08-18 15:58:32 +020090
Johan Jonker03872982022-04-09 18:55:06 +020091 priv->regs = dev_read_addr(dev);
92 }
Marek Vasut442c0f12018-08-18 15:58:32 +020093
94 return 0;
95}
96
Simon Goldschmidt0b6b82a2019-10-23 22:23:12 +020097static int dw_apb_timer_remove(struct udevice *dev)
98{
99 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
100
101 return reset_release_bulk(&priv->resets);
102}
103
Marek Vasut442c0f12018-08-18 15:58:32 +0200104static const struct timer_ops dw_apb_timer_ops = {
105 .get_count = dw_apb_timer_get_count,
106};
107
108static const struct udevice_id dw_apb_timer_ids[] = {
109 { .compatible = "snps,dw-apb-timer" },
110 {}
111};
112
Johan Jonker03872982022-04-09 18:55:06 +0200113U_BOOT_DRIVER(snps_dw_apb_timer) = {
114 .name = "snps_dw_apb_timer",
Marek Vasut442c0f12018-08-18 15:58:32 +0200115 .id = UCLASS_TIMER,
116 .ops = &dw_apb_timer_ops,
117 .probe = dw_apb_timer_probe,
Marek Vasut442c0f12018-08-18 15:58:32 +0200118 .of_match = dw_apb_timer_ids,
Johan Jonker32de1ee2022-04-09 18:55:07 +0200119 .of_to_plat = dw_apb_timer_of_to_plat,
Simon Goldschmidt0b6b82a2019-10-23 22:23:12 +0200120 .remove = dw_apb_timer_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700121 .priv_auto = sizeof(struct dw_apb_timer_priv),
Johan Jonker03872982022-04-09 18:55:06 +0200122 .plat_auto = sizeof(struct dw_apb_timer_plat),
Marek Vasut442c0f12018-08-18 15:58:32 +0200123};