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Sergiu Moga65c723f2022-04-01 12:27:24 +03001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
4 */
5
6#include <asm/arch/hardware.h>
7#include <asm/io.h>
8#include <asm/arch/at91_rstc.h>
9#include <clk.h>
10#include <common.h>
11#include <cpu_func.h>
12#include <dm.h>
13#include <dm/device_compat.h>
14#include <dm/device-internal.h>
15#include <sysreset.h>
16
17static int at91_sysreset_request(struct udevice *dev, enum sysreset_t type)
18{
19 at91_rstc_t *rstc = (at91_rstc_t *)dev_get_priv(dev);
20
21 writel(AT91_RSTC_KEY
22 | AT91_RSTC_CR_PROCRST /* Processor Reset */
23 | AT91_RSTC_CR_PERRST /* Peripheral Reset */
24#ifdef CONFIG_AT91RESET_EXTRST
25 | AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */
26#endif
27 , &rstc->cr);
28
29 return -EINPROGRESS;
30}
31
32static int at91_sysreset_probe(struct udevice *dev)
33{
34 struct clk slck;
35 void *priv;
36 int ret;
37
38 priv = dev_remap_addr(dev);
39 if (!priv)
40 return -EINVAL;
41
42 dev_set_priv(dev, priv);
43
44 ret = clk_get_by_index(dev, 0, &slck);
45 if (ret)
46 return ret;
47
48 ret = clk_prepare_enable(&slck);
49 if (ret)
50 return ret;
51
52 return 0;
53}
54
55static struct sysreset_ops at91_sysreset = {
56 .request = at91_sysreset_request,
57};
58
Sergiu Moga65c723f2022-04-01 12:27:24 +030059U_BOOT_DRIVER(sysreset_at91) = {
60 .id = UCLASS_SYSRESET,
Sergiu Mogabdcfc7d2023-01-04 16:03:18 +020061 .name = "at91_sysreset",
Sergiu Moga65c723f2022-04-01 12:27:24 +030062 .ops = &at91_sysreset,
63 .probe = at91_sysreset_probe,
Sergiu Moga65c723f2022-04-01 12:27:24 +030064};