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Markus Hubigba13f4e2012-08-07 17:43:23 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * (C) Copyright 2010
7 * Achim Ehrlich <aehrlich@taskit.de>
8 * taskit GmbH <www.taskit.de>
9 *
10 * (C) Copyright 2012
11 * Markus Hubig <mhubig@imko.de>
12 * IMKO GmbH <www.imko.de>
13 *
14 * Configuation settings for the stamp9g20 CPU module.
15 *
16 * See file CREDITS for list of people who contributed to this
17 * project.
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * MA 02111-1307 USA
33 */
34
35#ifndef __CONFIG_H
36#define __CONFIG_H
37
38/*
39 * SoC must be defined first, before hardware.h is included.
40 * In this case SoC is defined in boards.cfg.
41 */
42#include <asm/hardware.h>
43
44/*
45 * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
46 * program. Since the linker has to swallow that define, we must use a pure
47 * hex number here!
48 */
49#define CONFIG_SYS_TEXT_BASE 0x23f00000
50
51/* ARM asynchronous clock */
52#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
53#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
54#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
55
56/* misc settings */
57#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
58#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
59#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
60#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
61#define CONFIG_BOARD_EARLY_INIT_f /* call board_early_init_f() */
Markus Hubig880e5dc2012-08-16 08:22:09 +000062#define CONFIG_BOARD_POSTCLK_INIT /* call board_postclk_init() */
Markus Hubigba13f4e2012-08-07 17:43:23 +020063#define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */
64
65/* setting board specific options */
66#ifdef CONFIG_PORTUXG20
67# define CONFIG_MACH_TYPE MACH_TYPE_PORTUXG20
68# define CONFIG_MACB
69#else
70# define CONFIG_MACH_TYPE MACH_TYPE_STAMP9G20
71#endif
72
73/*
74 * SDRAM: 1 bank, 64 MB, base address 0x20000000
75 * Already initialized before u-boot gets started.
76 */
77#define CONFIG_NR_DRAM_BANKS 1
78#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
79#define CONFIG_SYS_SDRAM_SIZE (64 << 20)
80
81/*
82 * Perform a SDRAM Memtest from the start of SDRAM
83 * till the beginning of the U-Boot position in RAM.
84 */
85#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
86#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
87
88/* Size of malloc() pool */
89#define CONFIG_SYS_MALLOC_LEN \
90 ROUND(3 * CONFIG_ENV_SIZE + (128 << 10), 0x1000)
91
92/*
93 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
94 * leaving the correct space for initial global data structure above that
95 * address while providing maximum stack area below.
96 */
97#define CONFIG_SYS_INIT_SP_ADDR \
98 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
99
100/* NAND flash settings */
101#define CONFIG_NAND_ATMEL
102#define CONFIG_SYS_NO_FLASH
103#define CONFIG_SYS_MAX_NAND_DEVICE 1
104#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
105#define CONFIG_SYS_NAND_DBW_8
106#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
107#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
108#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
109#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
110
111/* general purpose I/O */
112#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
113#define CONFIG_AT91_GPIO /* enable the GPIO features */
114#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
115
116/* serial console */
117#define CONFIG_ATMEL_USART
118#define CONFIG_USART_BASE ATMEL_BASE_DBGU
119#define CONFIG_USART_ID ATMEL_ID_SYS
120#define CONFIG_BAUDRATE 115200
121
122/* LED configuration */
123#define CONFIG_STATUS_LED
124#define CONFIG_BOARD_SPECIFIC_LED
125
126/* The LED PINs */
127#define CONFIG_RED_LED AT91_PIN_PC5
128#define CONFIG_GREEN_LED AT91_PIN_PC4
129#define CONFIG_YELLOW_LED AT91_PIN_PC10
130
131#define STATUS_LED_RED 0
132#define STATUS_LED_GREEN 1
133#define STATUS_LED_YELLOW 2
134
135/* Red LED */
136#define STATUS_LED_BIT STATUS_LED_RED
137#define STATUS_LED_STATE STATUS_LED_OFF
138#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
139
140/* Green LED */
141#define STATUS_LED_BIT1 STATUS_LED_GREEN
142#define STATUS_LED_STATE1 STATUS_LED_ON
143#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
144
145/* Yellow LED */
146#define STATUS_LED_BIT2 STATUS_LED_YELLOW
147#define STATUS_LED_STATE2 STATUS_LED_OFF
148#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
149
150/* Boot status LED */
151#define STATUS_LED_BOOT STATUS_LED_GREEN
152
153/*
154 * Ethernet configuration
155 *
156 * PortuxG20 has always ethernet but for Stamp9G20 you
157 * can enable it here if your baseboard features ethernet.
158 */
159
160/* #define CONFIG_MACB */
161
162#ifdef CONFIG_MACB
163# define CONFIG_RMII /* use reduced MII inteface */
164# define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
165
166/* BOOTP and DHCP options */
167# define CONFIG_BOOTP_BOOTFILESIZE
168# define CONFIG_BOOTP_BOOTPATH
169# define CONFIG_BOOTP_GATEWAY
170# define CONFIG_BOOTP_HOSTNAME
171# define CONFIG_NFSBOOTCOMMAND \
172 "setenv autoload yes; setenv autoboot yes; " \
173 "setenv bootargs ${basicargs} ${mtdparts} " \
174 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
175 "dhcp"
176#endif /* CONFIG_MACB */
177
178/* Enable the watchdog */
179#define CONFIG_AT91SAM9_WATCHDOG
180#define CONFIG_HW_WATCHDOG
181
182/* USB configuration */
183#define CONFIG_USB_ATMEL
184#define CONFIG_USB_OHCI_NEW
185#define CONFIG_USB_STORAGE
186#define CONFIG_DOS_PARTITION
187#define CONFIG_SYS_USB_OHCI_CPU_INIT
188#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
189#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
190#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
191
192/* General Boot Parameter */
193#define CONFIG_BOOTDELAY 3
194#define CONFIG_BOOTCOMMAND "run flashboot"
195#define CONFIG_SYS_PROMPT "U-Boot> "
196#define CONFIG_SYS_CBSIZE 256
197#define CONFIG_SYS_MAXARGS 16
198#define CONFIG_SYS_PBSIZE \
199 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
200#define CONFIG_SYS_LONGHELP
201#define CONFIG_CMDLINE_EDITING
202
203/*
204 * RAM Memory address where to put the
205 * Linux Kernel befor starting.
206 */
207#define CONFIG_SYS_LOAD_ADDR 0x22000000
208
209/*
210 * The NAND Flash partitions:
211 * ==========================================
212 * 0x0000000-0x001ffff -> 128k, bootstrap
213 * 0x0020000-0x005ffff -> 256k, u-boot
214 * 0x0060000-0x007ffff -> 128k, env1
215 * 0x0080000-0x009ffff -> 128k, env2 (backup)
216 * 0x0100000-0x06fffff -> 6M, kernel
217 * 0x0700000-0x8000000 -> 121M, RootFS
218 */
219#define CONFIG_ENV_IS_IN_NAND
220#define CONFIG_ENV_OFFSET ((128 + 256) << 10)
221#define CONFIG_ENV_OFFSET_REDUND ((128 + 256 + 128) << 10)
222#define CONFIG_ENV_SIZE (128 << 10)
223
224/*
225 * Predefined environment variables.
226 * Usefull to define some easy to use boot commands.
227 */
228#define CONFIG_EXTRA_ENV_SETTINGS \
229 \
230 "basicargs=console=ttyS0,115200\0" \
231 \
232 "mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro," \
233 "256k(uboot)ro,128k(env1)ro," \
234 "128k(env2)ro,6M(linux),-(root)rw\0" \
235 \
236 "flashboot=setenv bootargs ${basicargs} ${mtdparts} " \
237 "root=/dev/mtdblock5 rootfstype=jffs2; " \
238 "nand read 0x22000000 0x100000 0x600000; " \
239 "bootm 22000000\0" \
240 \
241 "sdboot=setenv bootargs ${basicargs} ${mtdparts} " \
242 "root=/dev/mmcblk0p1 rootwait; " \
243 "nand read 0x22000000 0x100000 0x600000; " \
244 "bootm 22000000"
245
246/* Command line & features configuration */
247#include <config_cmd_default.h>
248#undef CONFIG_CMD_FPGA
249#undef CONFIG_CMD_IMI
250#undef CONFIG_CMD_IMLS
251#undef CONFIG_CMD_LOADS
252
253#define CONFIG_CMD_NAND
254#define CONFIG_CMD_USB
255#define CONFIG_CMD_FAT
256#define CONFIG_CMD_LED
257
258#ifdef CONFIG_MACB
259# define CONFIG_CMD_PING
260# define CONFIG_CMD_DHCP
261#else
262# undef CONFIG_CMD_BOOTD
263# undef CONFIG_CMD_NET
264# undef CONFIG_CMD_NFS
265#endif /* CONFIG_MACB */
266
267#endif /* __CONFIG_H */