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Gabor Juhos02c754a2013-05-22 03:57:37 +00001/*
2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License version 2 as published
6 * by the Free Software Foundation.
7 */
8
9#include <common.h>
Gabor Juhos439c50c2013-05-22 03:57:44 +000010#include <netdev.h>
Gabor Juhos02c754a2013-05-22 03:57:37 +000011
Gabor Juhos652ccee2013-05-22 03:57:42 +000012#include <asm/addrspace.h>
Gabor Juhosaed4fa42013-05-22 03:57:38 +000013#include <asm/io.h>
14#include <asm/malta.h>
Gabor Juhos652ccee2013-05-22 03:57:42 +000015#include <pci_gt64120.h>
Gabor Juhosaed4fa42013-05-22 03:57:38 +000016
Gabor Juhos02c754a2013-05-22 03:57:37 +000017phys_size_t initdram(int board_type)
18{
19 return CONFIG_SYS_MEM_SIZE;
20}
21
22int checkboard(void)
23{
24 puts("Board: MIPS Malta CoreLV (Qemu)\n");
25 return 0;
26}
Gabor Juhosaed4fa42013-05-22 03:57:38 +000027
Gabor Juhos439c50c2013-05-22 03:57:44 +000028int board_eth_init(bd_t *bis)
29{
30 return pci_eth_init(bis);
31}
32
Gabor Juhosaed4fa42013-05-22 03:57:38 +000033void _machine_restart(void)
34{
35 void __iomem *reset_base;
36
37 reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE);
38 __raw_writel(GORESET, reset_base);
39}
Gabor Juhos652ccee2013-05-22 03:57:42 +000040
41void pci_init_board(void)
42{
43 set_io_port_base(CKSEG1ADDR(MALTA_IO_PORT_BASE));
44
45 gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE),
46 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
47 0x10000000, 0x10000000, 128 * 1024 * 1024,
48 0x00000000, 0x00000000, 0x20000);
49}