blob: f4d1842771076e2f0d2bea2b8b17e6d1743f1906 [file] [log] [blame]
wdenka7556b22004-06-06 21:35:06 +00001/*
2 * A collection of structures, addresses, and values associated with
Wolfgang Denkc26914b2006-03-12 01:55:43 +01003 * the Motorola MPC885ADS board. Values common to all FADS family boards
wdenka7556b22004-06-06 21:35:06 +00004 * are in board/fads/fads.h
5 *
Wolfgang Denkc26914b2006-03-12 01:55:43 +01006 * Copyright (C) 2003-2004 Arabella Software Ltd.
wdenka7556b22004-06-06 21:35:06 +00007 * Yuli Barcohen <yuli@arabellasw.com>
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Wolfgang Denkc26914b2006-03-12 01:55:43 +010013#define CONFIG_MPC885ADS 1 /* MPC885ADS board */
wdenka7556b22004-06-06 21:35:06 +000014#define CONFIG_FADS 1 /* We are FADS compatible (more or less) */
15
Wolfgang Denkc26914b2006-03-12 01:55:43 +010016#define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */
wdenka7556b22004-06-06 21:35:06 +000017
Wolfgang Denkc26914b2006-03-12 01:55:43 +010018#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
wdenka7556b22004-06-06 21:35:06 +000019#undef CONFIG_8xx_CONS_SMC2
20#undef CONFIG_8xx_CONS_NONE
21#define CONFIG_BAUDRATE 38400
22
Wolfgang Denkc26914b2006-03-12 01:55:43 +010023#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
24#define CONFIG_8xx_CPUCLK_DEFAULT 50000000
25#define CFG_8xx_CPUCLK_MIN 40000000
26#define CFG_8xx_CPUCLK_MAX 133000000
wdenka7556b22004-06-06 21:35:06 +000027
28#define CONFIG_SDRAM_50MHZ 1
29
Stefan Roese37628252008-08-06 14:05:38 +020030#include "../../board/fads/fads.h"
wdenka7556b22004-06-06 21:35:06 +000031
wdenka7556b22004-06-06 21:35:06 +000032#define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */
33#define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V)
34
Wolfgang Denke0ae0912005-09-26 00:53:02 +020035#define CONFIG_HAS_ETH1
36
wdenka7556b22004-06-06 21:35:06 +000037#endif /* __CONFIG_H */