blob: 235994a4a2ebb9944b0672609d1ac5b63d431860 [file] [log] [blame]
Chen-Yu Tsai8d7da692020-01-12 23:36:13 +08001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
4 */
5
6#include "sunxi-bananapi-m2-plus.dtsi"
7
8/ {
9 /*
10 * Bananapi M2+ v1.2 uses a GPIO line to change the effective
11 * resistance on the CPU regulator's feedback pin.
12 */
13 reg_vdd_cpux: vdd-cpux {
14 compatible = "regulator-gpio";
15 regulator-name = "vdd-cpux";
16 regulator-type = "voltage";
17 regulator-boot-on;
18 regulator-always-on;
Samuel Hollandeef99ea2022-04-27 15:31:27 -050019 regulator-min-microvolt = <1108475>;
20 regulator-max-microvolt = <1308475>;
Chen-Yu Tsai8d7da692020-01-12 23:36:13 +080021 regulator-ramp-delay = <50>; /* 4ms */
22 gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
23 gpios-states = <0x1>;
Samuel Hollandeef99ea2022-04-27 15:31:27 -050024 states = <1108475 0>, <1308475 1>;
Chen-Yu Tsai8d7da692020-01-12 23:36:13 +080025 };
26};
27
28&cpu0 {
29 cpu-supply = <&reg_vdd_cpux>;
30};
Samuel Hollandeef99ea2022-04-27 15:31:27 -050031
32&cpu1 {
33 cpu-supply = <&reg_vdd_cpux>;
34};
35
36&cpu2 {
37 cpu-supply = <&reg_vdd_cpux>;
38};
39
40&cpu3 {
41 cpu-supply = <&reg_vdd_cpux>;
42};