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Johan Jonkera289fc72022-04-16 17:09:47 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2015 Google, Inc
4 */
5
6#ifndef __CONFIG_RK3066_COMMON_H
7#define __CONFIG_RK3066_COMMON_H
8
9#include <asm/arch-rockchip/hardware.h>
10#include "rockchip-common.h"
11
Tom Rini3088b312022-12-04 10:04:13 -050012#define CFG_IRAM_BASE 0x10080000
Johan Jonkera289fc72022-04-16 17:09:47 +020013
Tom Rinibb4dd962022-11-16 13:10:37 -050014#define CFG_SYS_SDRAM_BASE 0x60000000
Johan Jonkera289fc72022-04-16 17:09:47 +020015#define SDRAM_BANK_SIZE (1024UL << 20UL)
16#define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
17
Johan Jonkera289fc72022-04-16 17:09:47 +020018#define ENV_MEM_LAYOUT_SETTINGS \
19 "scriptaddr=0x60000000\0" \
20 "pxefile_addr_r=0x60100000\0" \
21 "fdt_addr_r=0x61f00000\0" \
22 "kernel_addr_r=0x62000000\0" \
23 "ramdisk_addr_r=0x64000000\0"
24
25#include <config_distro_bootcmd.h>
26
Tom Rinic9edebe2022-12-04 10:03:50 -050027#define CFG_EXTRA_ENV_SETTINGS \
Johan Jonkera289fc72022-04-16 17:09:47 +020028 "fdt_high=0x6fffffff\0" \
29 "initrd_high=0x6fffffff\0" \
30 "partitions=" PARTS_DEFAULT \
31 ENV_MEM_LAYOUT_SETTINGS \
32 ROCKCHIP_DEVICE_SETTINGS \
33 BOOTENV
34
Johan Jonkera289fc72022-04-16 17:09:47 +020035#endif