Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org> |
| 3 | * |
| 4 | * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com> |
| 5 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 6 | * Copyright (C) 2004 Texas Instruments. |
| 7 | * |
| 8 | * ---------------------------------------------------------------------------- |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 22 | * ---------------------------------------------------------------------------- |
| 23 | */ |
| 24 | |
| 25 | #include <common.h> |
| 26 | #include <asm/errno.h> |
| 27 | #include <asm/arch/hardware.h> |
| 28 | #include <asm/io.h> |
| 29 | #include <asm/arch/davinci_misc.h> |
| 30 | #include <ns16550.h> |
Wolfgang Denk | 0ae439f | 2011-09-10 22:26:28 +0200 | [diff] [blame] | 31 | #include <nand.h> |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 32 | |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
| 35 | #define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) |
| 36 | |
| 37 | static const struct pinmux_config mii_pins[] = { |
| 38 | { pinmux(2), 8, 1 }, |
| 39 | { pinmux(2), 8, 2 }, |
| 40 | { pinmux(2), 8, 3 }, |
| 41 | { pinmux(2), 8, 4 }, |
| 42 | { pinmux(2), 8, 5 }, |
| 43 | { pinmux(2), 8, 6 }, |
| 44 | { pinmux(2), 8, 7 } |
| 45 | }; |
| 46 | |
| 47 | static const struct pinmux_config mdio_pins[] = { |
| 48 | { pinmux(4), 8, 0 }, |
| 49 | { pinmux(4), 8, 1 } |
| 50 | }; |
| 51 | |
| 52 | static const struct pinmux_config nand_pins[] = { |
| 53 | { pinmux(7), 1, 1 }, |
| 54 | { pinmux(7), 1, 2 }, |
| 55 | { pinmux(7), 1, 4 }, |
| 56 | { pinmux(7), 1, 5 }, |
| 57 | { pinmux(9), 1, 0 }, |
| 58 | { pinmux(9), 1, 1 }, |
| 59 | { pinmux(9), 1, 2 }, |
| 60 | { pinmux(9), 1, 3 }, |
| 61 | { pinmux(9), 1, 4 }, |
| 62 | { pinmux(9), 1, 5 }, |
| 63 | { pinmux(9), 1, 6 }, |
| 64 | { pinmux(9), 1, 7 }, |
| 65 | { pinmux(12), 1, 5 }, |
| 66 | { pinmux(12), 1, 6 } |
| 67 | }; |
| 68 | |
| 69 | static const struct pinmux_config uart2_pins[] = { |
| 70 | { pinmux(0), 4, 6 }, |
| 71 | { pinmux(0), 4, 7 }, |
| 72 | { pinmux(4), 2, 4 }, |
| 73 | { pinmux(4), 2, 5 } |
| 74 | }; |
| 75 | |
| 76 | static const struct pinmux_config i2c_pins[] = { |
| 77 | { pinmux(4), 2, 4 }, |
| 78 | { pinmux(4), 2, 5 } |
| 79 | }; |
| 80 | |
| 81 | static const struct pinmux_resource pinmuxes[] = { |
| 82 | PINMUX_ITEM(mii_pins), |
| 83 | PINMUX_ITEM(mdio_pins), |
| 84 | PINMUX_ITEM(i2c_pins), |
| 85 | PINMUX_ITEM(nand_pins), |
| 86 | PINMUX_ITEM(uart2_pins), |
| 87 | }; |
| 88 | |
| 89 | static const struct lpsc_resource lpsc[] = { |
| 90 | { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ |
| 91 | { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ |
| 92 | { DAVINCI_LPSC_EMAC }, /* image download */ |
| 93 | { DAVINCI_LPSC_UART2 }, /* console */ |
| 94 | { DAVINCI_LPSC_GPIO }, |
| 95 | }; |
| 96 | |
| 97 | void board_init_f(ulong bootflag) |
| 98 | { |
| 99 | /* |
| 100 | * Kick Registers need to be set to allow access to Pin Mux registers |
| 101 | */ |
| 102 | writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); |
| 103 | writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); |
| 104 | |
| 105 | /* setup the SUSPSRC for ARM to control emulation suspend */ |
| 106 | writel(readl(&davinci_syscfg_regs->suspsrc) & |
| 107 | ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | |
| 108 | DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | |
| 109 | DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); |
| 110 | |
| 111 | /* Power on required peripherals |
| 112 | * ARM does not have acess by default to PSC0 and PSC1 |
| 113 | * assuming here that the DSP bootloader has set the IOPU |
| 114 | * such that PSC access is available to ARM |
| 115 | */ |
| 116 | da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)); |
| 117 | |
| 118 | /* configure pinmux settings */ |
| 119 | davinci_configure_pin_mux_items(pinmuxes, |
| 120 | ARRAY_SIZE(pinmuxes)); |
| 121 | |
| 122 | writel(readl(&davinci_uart2_ctrl_regs->pwremu_mgmt) | |
| 123 | (DAVINCI_UART_PWREMU_MGMT_FREE) | |
| 124 | (DAVINCI_UART_PWREMU_MGMT_URRST) | |
| 125 | (DAVINCI_UART_PWREMU_MGMT_UTRST), |
| 126 | &davinci_uart2_ctrl_regs->pwremu_mgmt); |
| 127 | |
| 128 | NS16550_init((NS16550_t)(DAVINCI_UART2_BASE), |
| 129 | CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); |
| 130 | |
| 131 | puts("Nand boot...\n"); |
| 132 | |
| 133 | nand_boot(); |
| 134 | } |
| 135 | |
| 136 | void puts(const char *str) |
| 137 | { |
| 138 | while (*str) |
| 139 | putc(*str++); |
| 140 | } |
| 141 | |
| 142 | void putc(char c) |
| 143 | { |
| 144 | if (gd->flags & GD_FLG_SILENT) |
| 145 | return; |
| 146 | |
| 147 | if (c == '\n') |
| 148 | NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), '\r'); |
| 149 | |
| 150 | NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), c); |
| 151 | } |
| 152 | |
| 153 | void hang(void) |
| 154 | { |
| 155 | puts("### ERROR ### Please RESET the board ###\n"); |
| 156 | for (;;) |
| 157 | ; |
| 158 | } |