| Chandan Nath | 1c95969 | 2011-10-14 02:58:22 +0000 | [diff] [blame] | 1 | /* |
| 2 | * lowlevel_init.S |
| 3 | * |
| 4 | * AM33XX low level initialization. |
| 5 | * |
| 6 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
| 7 | * |
| 8 | * Initial Code by: |
| 9 | * Mansoor Ahamed <mansoor.ahamed@ti.com> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any |
| 17 | * kind, whether express or implied; without even the implied warranty |
| 18 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | */ |
| 21 | |
| 22 | #include <config.h> |
| 23 | #include <asm/arch/hardware.h> |
| 24 | |
| 25 | _mark1: |
| 26 | .word mark1 |
| 27 | _lowlevel_init1: |
| 28 | .word lowlevel_init |
| 29 | _s_init_start: |
| 30 | .word s_init_start |
| 31 | |
| 32 | _TEXT_BASE: |
| 33 | .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ |
| 34 | |
| 35 | /***************************************************************************** |
| 36 | * lowlevel_init: - Platform low level init. |
| 37 | ****************************************************************************/ |
| 38 | .globl lowlevel_init |
| 39 | lowlevel_init: |
| 40 | |
| 41 | /* The link register is saved in ip by start.S */ |
| 42 | mov r6, ip |
| 43 | /* check if we are already running from RAM */ |
| 44 | ldr r2, _lowlevel_init1 |
| 45 | ldr r3, _TEXT_BASE |
| 46 | sub r4, r2, r3 |
| 47 | sub r0, pc, r4 |
| 48 | ldr sp, SRAM_STACK |
| 49 | mark1: |
| 50 | ldr r5, _mark1 |
| 51 | sub r5, r5, r2 /* bytes between mark1 and lowlevel_init */ |
| 52 | sub r0, r0, r5 /* r0 <- _start w.r.t current place of execution */ |
| 53 | mov r10, #0x0 /* r10 has in_ddr used by s_init() */ |
| 54 | |
| 55 | ands r0, r0, #0xC0000000 |
| 56 | /* MSB 2 bits <> 0 then we are in ocmc or DDR */ |
| 57 | cmp r0, #0x80000000 |
| 58 | bne s_init_start |
| 59 | mov r10, #0x01 |
| 60 | b s_init_start |
| 61 | |
| 62 | s_init_start: |
| 63 | mov r0, r10 /* passing in_ddr in r0 */ |
| 64 | bl s_init |
| 65 | /* back to arch calling code */ |
| 66 | mov pc, r6 |
| 67 | /* the literal pools origin */ |
| 68 | .ltorg |
| 69 | |
| 70 | SRAM_STACK: |
| 71 | /* Place stack at the top */ |
| 72 | .word LOW_LEVEL_SRAM_STACK |