blob: d66f89ea51fae969a4a6a5037f5cea3baf8faba6 [file] [log] [blame]
Masahiro Yamadafa714412015-07-21 14:04:22 +09001/*
2 * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <linux/io.h>
9#include <mach/sbc-regs.h>
10#include <mach/sg-regs.h>
11
12void sbc_init(void)
13{
14 /* only address/data multiplex mode is supported */
15
16 /*
17 * Only CS1 is connected to support card.
18 * BKSZ[1:0] should be set to "01".
19 */
20 writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
21 writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
22 writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
23
24 if (boot_is_swapped()) {
25 /*
26 * Boot Swap On: boot from external NOR/SRAM
27 * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
28 *
29 * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank
30 * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
31 */
32 writel(0x0000bc01, SBBASE0);
33 } else {
34 /*
35 * Boot Swap Off: boot from mask ROM
36 * 0x00000000-0x01ffffff: mask ROM
37 * 0x02000000-0x03efffff: memory bank (31MB)
38 * 0x03f00000-0x03ffffff: peripherals (1MB)
39 */
40 writel(0x0000be01, SBBASE0); /* dummy */
41 writel(0x0200be01, SBBASE1);
42 }
43
44 sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */
45}