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git01.mediatek.com / filogic / uboot / ee1d825df5be1586a1317a5e60659d6a5a2224fe / . / arch / arm / include / asm / global_data.h
blob: 77d2653e27a1002a7afcccaf4513d987570294b4 [file] [log] [blame]
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]1/*
Wolfgang Denkf710efd2010-07-24 20:22:02 +0200[diff] [blame]2 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]6 */
7
8#ifndef __ASM_GBL_DATA_H
9#define __ASM_GBL_DATA_H
Simon Glass3ac47d72012-12-13 20:48:30 +0000[diff] [blame]10
11/* Architecture-specific global data */
12struct arch_global_data {
Simon Glass9e247d12012-12-13 20:49:05 +0000[diff] [blame]13#if defined(CONFIG_FSL_ESDHC)
14 u32 sdhc_clk;
15#endif
Zhao Qiang5ad93952014-09-25 13:52:25 +0800[diff] [blame]16
17#if defined(CONFIG_U_QE)
18 u32 qe_clk;
19 u32 brg_clk;
20 uint mp_alloc_base;
21 uint mp_alloc_top;
22#endif /* CONFIG_U_QE */
23
Simon Glasse61accc2012-12-13 20:48:31 +0000[diff] [blame]24#ifdef CONFIG_AT91FAMILY
25 /* "static data" needed by at91's clock.c */
26 unsigned long cpu_clk_rate_hz;
27 unsigned long main_clk_rate_hz;
28 unsigned long mck_rate_hz;
29 unsigned long plla_rate_hz;
30 unsigned long pllb_rate_hz;
31 unsigned long at91_pllb_usb_init;
32#endif
Simon Glass6ed6e032012-12-13 20:48:32 +0000[diff] [blame]33 /* "static data" needed by most of timer.c on ARM platforms */
34 unsigned long timer_rate_hz;
Simon Glass8ca15202012-12-13 20:48:33 +0000[diff] [blame]35 unsigned long tbu;
Simon Glass2655ee12012-12-13 20:48:34 +0000[diff] [blame]36 unsigned long tbl;
Simon Glassa848da52012-12-13 20:48:35 +0000[diff] [blame]37 unsigned long lastinc;
Simon Glass9cbe003a2012-12-13 20:48:36 +0000[diff] [blame]38 unsigned long long timer_reset_value;
Simon Glass6b4ee152012-12-13 20:48:39 +0000[diff] [blame]39#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
40 unsigned long tlb_addr;
Alexander Grafe317fe82016-03-04 01:09:47 +0100[diff] [blame]41 unsigned long tlb_size;
Alexander Grafce0a64e2016-03-04 01:09:54 +0100[diff] [blame]42#if defined(CONFIG_ARM64)
Alexander Grafe317fe82016-03-04 01:09:47 +0100[diff] [blame]43 unsigned long tlb_fillptr;
44 unsigned long tlb_emerg;
Sergey Temerkhanov78eaa492015-10-14 09:55:45 -0700[diff] [blame]45#endif
Simon Glass6b4ee152012-12-13 20:48:39 +0000[diff] [blame]46#endif
SRICHARAN R4af19882013-04-24 00:41:23 +0000[diff] [blame]47
Paul Kocialkowskid5b76242015-07-15 16:02:19 +0200[diff] [blame]48#ifdef CONFIG_OMAP_COMMON
49 u32 omap_boot_device;
50 u32 omap_boot_mode;
51 u8 omap_ch_flags;
SRICHARAN R4af19882013-04-24 00:41:23 +0000[diff] [blame]52#endif
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]53#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
York Sun1ecab782015-01-06 13:18:49 -0800[diff] [blame]54 unsigned long mem2_clk;
55#endif
Simon Glass3ac47d72012-12-13 20:48:30 +0000[diff] [blame]56};
57
Simon Glass6878cd12012-12-13 20:49:14 +0000[diff] [blame]58#include <asm-generic/global_data.h>
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]59
Jeroen Hofstee43614d12014-07-30 21:54:52 +0200[diff] [blame]60#ifdef __clang__
61
62#define DECLARE_GLOBAL_DATA_PTR
63#define gd get_gd()
64
65static inline gd_t *get_gd(void)
66{
67 gd_t *gd_ptr;
68
69#ifdef CONFIG_ARM64
70 /*
71 * Make will already error that reserving x18 is not supported at the
72 * time of writing, clang: error: unknown argument: '-ffixed-x18'
73 */
74 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
75#else
76 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
77#endif
78
79 return gd_ptr;
80}
81
82#else
83
David Feng85fd5f12013-12-14 11:47:35 +0800[diff] [blame]84#ifdef CONFIG_ARM64
85#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
86#else
87#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
88#endif
Jeroen Hofstee43614d12014-07-30 21:54:52 +0200[diff] [blame]89#endif
wdenk0157ced2002-10-21 17:04:47 +0000[diff] [blame]90
91#endif /* __ASM_GBL_DATA_H */