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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ying Zhang28027d72013-09-06 17:30:56 +08002/*
3 * Copyright 2013 Freescale Semiconductor, Inc.
Ying Zhang28027d72013-09-06 17:30:56 +08004 */
5
6#include <common.h>
Simon Glassa73bda42015-11-08 23:47:45 -07007#include <console.h>
Simon Glass79fd2142019-08-01 09:46:43 -06008#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -06009#include <env_internal.h>
Ying Zhang28027d72013-09-06 17:30:56 +080010#include <ns16550.h>
11#include <malloc.h>
12#include <mmc.h>
13#include <nand.h>
14#include <i2c.h>
15#include <fsl_esdhc.h>
Ying Zhangf74fd4e2013-09-06 17:30:57 +080016#include <spi_flash.h>
Simon Glassdd8e2242016-09-24 18:20:10 -060017#include "../common/spl.h"
Ying Zhang28027d72013-09-06 17:30:56 +080018
19DECLARE_GLOBAL_DATA_PTR;
20
York Sun863e8d82014-02-11 11:57:26 -080021phys_size_t get_effective_memsize(void)
Ying Zhang28027d72013-09-06 17:30:56 +080022{
23 return CONFIG_SYS_L2_SIZE;
24}
25
26void board_init_f(ulong bootflag)
27{
28 u32 plat_ratio, bus_clk;
29 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
30
31 console_init_f();
32
33 /* Set pmuxcr to allow both i2c1 and i2c2 */
34 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
35 setbits_be32(&gur->pmuxcr,
36 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
37
38 /* Read back the register to synchronize the write. */
39 in_be32(&gur->pmuxcr);
40
Ying Zhangf74fd4e2013-09-06 17:30:57 +080041#ifdef CONFIG_SPL_SPI_BOOT
42 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
43#endif
44
Ying Zhang28027d72013-09-06 17:30:56 +080045 /* initialize selected port with appropriate baud rate */
46 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
47 plat_ratio >>= 1;
48 bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
49 gd->bus_clk = bus_clk;
50
51 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
52 bus_clk / 16 / CONFIG_BAUDRATE);
53#ifdef CONFIG_SPL_MMC_BOOT
54 puts("\nSD boot...\n");
Ying Zhangf74fd4e2013-09-06 17:30:57 +080055#elif defined(CONFIG_SPL_SPI_BOOT)
56 puts("\nSPI Flash boot...\n");
Ying Zhang28027d72013-09-06 17:30:56 +080057#endif
58
59 /* copy code to RAM and jump to it - this should not return */
60 /* NOTE - code has to be copied out of NAND buffer before
61 * other blocks can be read.
62 */
63 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
64}
65
66void board_init_r(gd_t *gd, ulong dest_addr)
67{
68 /* Pointer is writable since we allocated a register for it */
69 gd = (gd_t *)CONFIG_SPL_GD_ADDR;
70 bd_t *bd;
71
72 memset(gd, 0, sizeof(gd_t));
73 bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
74 memset(bd, 0, sizeof(bd_t));
75 gd->bd = bd;
76 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
77 bd->bi_memsize = CONFIG_SYS_L2_SIZE;
78
Simon Glass302445a2017-01-23 13:31:22 -070079 arch_cpu_init();
Ying Zhang28027d72013-09-06 17:30:56 +080080 get_clocks();
81 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
82 CONFIG_SPL_RELOC_MALLOC_SIZE);
Sumit Garg2ff056b2016-05-25 12:41:48 -040083 gd->flags |= GD_FLG_FULL_MALLOC_INIT;
Ying Zhang28027d72013-09-06 17:30:56 +080084
Ying Zhangb8b404d2013-09-06 17:30:58 +080085#ifndef CONFIG_SPL_NAND_BOOT
Ying Zhang28027d72013-09-06 17:30:56 +080086 env_init();
Ying Zhangb8b404d2013-09-06 17:30:58 +080087#endif
Ying Zhang28027d72013-09-06 17:30:56 +080088#ifdef CONFIG_SPL_MMC_BOOT
89 mmc_initialize(bd);
90#endif
91 /* relocate environment function pointers etc. */
Ying Zhangb8b404d2013-09-06 17:30:58 +080092#ifdef CONFIG_SPL_NAND_BOOT
93 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
94 (uchar *)CONFIG_ENV_ADDR);
95 gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
Simon Glass4bc2ad22017-08-03 12:21:56 -060096 gd->env_valid = ENV_VALID;
Ying Zhangb8b404d2013-09-06 17:30:58 +080097#else
Ying Zhang28027d72013-09-06 17:30:56 +080098 env_relocate();
Ying Zhangb8b404d2013-09-06 17:30:58 +080099#endif
Ying Zhang28027d72013-09-06 17:30:56 +0800100
101#ifdef CONFIG_SYS_I2C
102 i2c_init_all();
103#else
104 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
105#endif
106
Simon Glassd35f3382017-04-06 12:47:05 -0600107 dram_init();
Ying Zhangb8b404d2013-09-06 17:30:58 +0800108#ifdef CONFIG_SPL_NAND_BOOT
109 puts("Tertiary program loader running in sram...");
110#else
Ying Zhang28027d72013-09-06 17:30:56 +0800111 puts("Second program loader running in sram...\n");
Ying Zhangb8b404d2013-09-06 17:30:58 +0800112#endif
Ying Zhang28027d72013-09-06 17:30:56 +0800113
114#ifdef CONFIG_SPL_MMC_BOOT
115 mmc_boot();
Ying Zhangf74fd4e2013-09-06 17:30:57 +0800116#elif defined(CONFIG_SPL_SPI_BOOT)
Simon Glassdd8e2242016-09-24 18:20:10 -0600117 fsl_spi_boot();
Ying Zhangb8b404d2013-09-06 17:30:58 +0800118#elif defined(CONFIG_SPL_NAND_BOOT)
119 nand_boot();
Ying Zhang28027d72013-09-06 17:30:56 +0800120#endif
121}