blob: 22669b6160e6dd27c20e1a4ebf9318055cf83bc4 [file] [log] [blame]
Tom Warrenb3878b82011-06-17 06:27:28 +00001/*
2 * NVIDIA Tegra2 GPIO handling.
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/*
26 * Based on (mostly copied from) kw_gpio.c based Linux 2.6 kernel driver.
27 * Tom Warren (twarren@nvidia.com)
28 */
29
30#include <common.h>
31#include <asm/io.h>
32#include <asm/bitops.h>
33#include <asm/arch/tegra2.h>
34#include <asm/gpio.h>
35
36enum {
37 TEGRA2_CMD_INFO,
38 TEGRA2_CMD_PORT,
39 TEGRA2_CMD_OUTPUT,
40 TEGRA2_CMD_INPUT,
41};
42
43static struct gpio_names {
44 char name[GPIO_NAME_SIZE];
45} gpio_names[MAX_NUM_GPIOS];
46
47static char *get_name(int i)
48{
49 return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
50}
51
52/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */
53static int get_config(int gp)
54{
55 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
56 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
57 u32 u;
58 int type;
59
60 u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
61 type = (u >> GPIO_BIT(gp)) & 1;
62
63 debug("get_config: port = %d, bit = %d is %s\n",
64 GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
65
66 return type;
67}
68
69/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */
70static void set_config(int gp, int type)
71{
72 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
73 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
74 u32 u;
75
76 debug("set_config: port = %d, bit = %d, %s\n",
77 GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
78
79 u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
80 if (type) /* GPIO */
81 u |= 1 << GPIO_BIT(gp);
82 else
83 u &= ~(1 << GPIO_BIT(gp));
84 writel(u, &bank->gpio_config[GPIO_PORT(gp)]);
85}
86
87/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */
88static int get_direction(int gp)
89{
90 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
91 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
92 u32 u;
93 int dir;
94
95 u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
96 dir = (u >> GPIO_BIT(gp)) & 1;
97
98 debug("get_direction: port = %d, bit = %d, %s\n",
99 GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN");
100
101 return dir;
102}
103
104/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */
105static void set_direction(int gp, int output)
106{
107 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
108 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
109 u32 u;
110
111 debug("set_direction: port = %d, bit = %d, %s\n",
112 GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN");
113
114 u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
115 if (output)
116 u |= 1 << GPIO_BIT(gp);
117 else
118 u &= ~(1 << GPIO_BIT(gp));
119 writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]);
120}
121
122/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */
123static void set_level(int gp, int high)
124{
125 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
126 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
127 u32 u;
128
129 debug("set_level: port = %d, bit %d == %d\n",
130 GPIO_FULLPORT(gp), GPIO_BIT(gp), high);
131
132 u = readl(&bank->gpio_out[GPIO_PORT(gp)]);
133 if (high)
134 u |= 1 << GPIO_BIT(gp);
135 else
136 u &= ~(1 << GPIO_BIT(gp));
137 writel(u, &bank->gpio_out[GPIO_PORT(gp)]);
138}
139
140/*
141 * Generic_GPIO primitives.
142 */
143
144int gpio_request(int gp, const char *label)
145{
146 if (gp >= MAX_NUM_GPIOS)
147 return -1;
148
Stephen Warrenedc513f2011-10-06 12:52:22 +0000149 if (label != NULL) {
150 strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE);
151 gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0';
152 }
Tom Warrenb3878b82011-06-17 06:27:28 +0000153
154 /* Configure as a GPIO */
155 set_config(gp, 1);
156
157 return 0;
158}
159
160void gpio_free(int gp)
161{
162}
163
164/* read GPIO OUT value of pin 'gp' */
165static int gpio_get_output_value(int gp)
166{
167 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
168 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
169 int val;
170
171 debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
172 gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
173
174 val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
175
176 return (val >> GPIO_BIT(gp)) & 1;
177}
178
179void gpio_toggle_value(int gp)
180{
181 gpio_set_value(gp, !gpio_get_output_value(gp));
182}
183
184/* set GPIO pin 'gp' as an input */
185int gpio_direction_input(int gp)
186{
187 debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
188 gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
189
190 /* Configure GPIO direction as input. */
191 set_direction(gp, 0);
192
193 return 0;
194}
195
196/* set GPIO pin 'gp' as an output, with polarity 'value' */
197int gpio_direction_output(int gp, int value)
198{
199 debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
200 gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW");
201
202 /* Configure GPIO output value. */
203 set_level(gp, value);
204
205 /* Configure GPIO direction as output. */
206 set_direction(gp, 1);
207
208 return 0;
209}
210
211/* read GPIO IN value of pin 'gp' */
212int gpio_get_value(int gp)
213{
214 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
215 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
216 int val;
217
218 debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
219 gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
220
221 val = readl(&bank->gpio_in[GPIO_PORT(gp)]);
222
223 return (val >> GPIO_BIT(gp)) & 1;
224}
225
226/* write GPIO OUT value to pin 'gp' */
227void gpio_set_value(int gp, int value)
228{
229 debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
230 gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value);
231
232 /* Configure GPIO output value. */
233 set_level(gp, value);
234}
235
236/*
237 * Display Tegra GPIO information
238 */
239void gpio_info(void)
240{
241 int c, type;
242
243 for (c = 0; c < MAX_NUM_GPIOS; c++) {
244 type = get_config(c); /* GPIO, not SFPIO */
245 if (type) {
246 printf("GPIO_%d:\t%s is an %s, ", c,
247 get_name(c),
248 get_direction(c) ? "OUTPUT" : "INPUT");
249 if (get_direction(c))
250 printf("value = %d", gpio_get_output_value(c));
251 else
252 printf("value = %d", gpio_get_value(c));
253 printf("\n");
254 } else
255 continue;
256 }
257}