Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | 7613579 | 2017-05-17 08:23:05 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Ugly header containing required header files. This could be adjusted |
| 4 | * so that including asm/arch/hardware includes the correct file. |
| 5 | * |
| 6 | * (C) Copyright 2000-2009 |
| 7 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Simon Glass | 7613579 | 2017-05-17 08:23:05 -0600 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __ASM_PPC_H |
| 11 | #define __ASM_PPC_H |
| 12 | |
| 13 | #ifndef __ASSEMBLY__ |
| 14 | |
Christophe Leroy | b3510fb | 2018-03-16 17:20:41 +0100 | [diff] [blame] | 15 | #if defined(CONFIG_MPC8xx) |
| 16 | #include <asm/immap_8xx.h> |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 17 | #endif |
Simon Glass | 7613579 | 2017-05-17 08:23:05 -0600 | [diff] [blame] | 18 | #ifdef CONFIG_MPC86xx |
| 19 | #include <mpc86xx.h> |
| 20 | #include <asm/immap_86xx.h> |
| 21 | #endif |
| 22 | #ifdef CONFIG_MPC85xx |
| 23 | #include <mpc85xx.h> |
| 24 | #include <asm/immap_85xx.h> |
| 25 | #endif |
| 26 | #ifdef CONFIG_MPC83xx |
| 27 | #include <mpc83xx.h> |
| 28 | #include <asm/immap_83xx.h> |
| 29 | #endif |
Simon Glass | 7613579 | 2017-05-17 08:23:05 -0600 | [diff] [blame] | 30 | #ifdef CONFIG_SOC_DA8XX |
| 31 | #include <asm/arch/hardware.h> |
| 32 | #endif |
| 33 | #ifdef CONFIG_FSL_LSCH3 |
| 34 | #include <asm/arch/immap_lsch3.h> |
| 35 | #endif |
| 36 | #ifdef CONFIG_FSL_LSCH2 |
| 37 | #include <asm/arch/immap_lsch2.h> |
| 38 | #endif |
| 39 | |
Christophe Leroy | 9b021ae | 2017-07-13 15:10:02 +0200 | [diff] [blame] | 40 | #include <asm/processor.h> |
| 41 | |
Christophe Leroy | bda8947 | 2018-03-16 17:20:39 +0100 | [diff] [blame] | 42 | static inline uint get_immr(void) |
Christophe Leroy | 9b021ae | 2017-07-13 15:10:02 +0200 | [diff] [blame] | 43 | { |
Christophe Leroy | bda8947 | 2018-03-16 17:20:39 +0100 | [diff] [blame] | 44 | return mfspr(SPRN_IMMR); |
Christophe Leroy | 9b021ae | 2017-07-13 15:10:02 +0200 | [diff] [blame] | 45 | } |
Christophe Leroy | edd4ebe | 2018-03-16 17:20:37 +0100 | [diff] [blame] | 46 | |
Christophe Leroy | 3d97f8e | 2017-07-13 15:10:06 +0200 | [diff] [blame] | 47 | static inline uint get_pvr(void) |
| 48 | { |
| 49 | return mfspr(PVR); |
| 50 | } |
| 51 | |
| 52 | static inline uint get_svr(void) |
| 53 | { |
| 54 | return mfspr(SVR); |
| 55 | } |
Simon Glass | 243182c | 2017-05-17 08:23:06 -0600 | [diff] [blame] | 56 | |
Heiko Schocher | 2028012 | 2017-06-27 16:49:14 +0200 | [diff] [blame] | 57 | #if defined(CONFIG_MPC85xx) || \ |
Simon Glass | 243182c | 2017-05-17 08:23:06 -0600 | [diff] [blame] | 58 | defined(CONFIG_MPC86xx) || \ |
| 59 | defined(CONFIG_MPC83xx) |
| 60 | unsigned char in8(unsigned int); |
| 61 | void out8(unsigned int, unsigned char); |
| 62 | unsigned short in16(unsigned int); |
| 63 | unsigned short in16r(unsigned int); |
| 64 | void out16(unsigned int, unsigned short value); |
| 65 | void out16r(unsigned int, unsigned short value); |
| 66 | unsigned long in32(unsigned int); |
| 67 | unsigned long in32r(unsigned int); |
| 68 | void out32(unsigned int, unsigned long value); |
| 69 | void out32r(unsigned int, unsigned long value); |
| 70 | void ppcDcbf(unsigned long value); |
| 71 | void ppcDcbi(unsigned long value); |
| 72 | void ppcSync(void); |
| 73 | void ppcDcbz(unsigned long value); |
| 74 | #endif |
| 75 | #if defined(CONFIG_MPC83xx) |
| 76 | void ppcDWload(unsigned int *addr, unsigned int *ret); |
| 77 | void ppcDWstore(unsigned int *addr, unsigned int *value); |
| 78 | void disable_addr_trans(void); |
| 79 | void enable_addr_trans(void); |
| 80 | #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) |
| 81 | void ddr_enable_ecc(unsigned int dram_size); |
| 82 | #endif |
| 83 | #endif |
| 84 | |
Simon Glass | 243182c | 2017-05-17 08:23:06 -0600 | [diff] [blame] | 85 | #if defined(CONFIG_MPC85xx) |
| 86 | typedef MPC85xx_SYS_INFO sys_info_t; |
| 87 | void get_sys_info(sys_info_t *); |
| 88 | void ft_fixup_cpu(void *, u64); |
| 89 | void ft_fixup_num_cores(void *); |
| 90 | #endif |
| 91 | #if defined(CONFIG_MPC86xx) |
| 92 | ulong get_bus_freq(ulong); |
| 93 | typedef MPC86xx_SYS_INFO sys_info_t; |
| 94 | void get_sys_info(sys_info_t *); |
| 95 | static inline ulong get_ddr_freq(ulong dummy) |
| 96 | { |
| 97 | return get_bus_freq(dummy); |
| 98 | } |
| 99 | #else |
| 100 | ulong get_ddr_freq(ulong); |
| 101 | #endif |
| 102 | |
Christophe Leroy | bed4020 | 2017-07-13 15:09:52 +0200 | [diff] [blame] | 103 | static inline unsigned long get_msr(void) |
| 104 | { |
| 105 | unsigned long msr; |
| 106 | |
| 107 | asm volatile ("mfmsr %0" : "=r" (msr) : ); |
| 108 | |
| 109 | return msr; |
| 110 | } |
| 111 | |
| 112 | static inline void set_msr(unsigned long msr) |
| 113 | { |
| 114 | asm volatile ("mtmsr %0" : : "r" (msr)); |
| 115 | } |
| 116 | |
Christophe Leroy | 31f6e93 | 2017-07-13 15:09:54 +0200 | [diff] [blame] | 117 | #ifdef CONFIG_CMD_REGINFO |
| 118 | void print_reginfo(void); |
| 119 | #endif |
| 120 | |
Tom Rini | ce10398 | 2017-08-13 22:44:37 -0400 | [diff] [blame] | 121 | void interrupt_init_cpu(unsigned *); |
Christophe Leroy | 4a4750b | 2017-07-13 15:10:08 +0200 | [diff] [blame] | 122 | void timer_interrupt_cpu(struct pt_regs *); |
| 123 | unsigned long search_exception_table(unsigned long addr); |
Simon Glass | 4be8fc9 | 2019-12-28 10:44:57 -0700 | [diff] [blame] | 124 | void upmconfig(uint upm, uint *table, uint size); |
Christophe Leroy | 4a4750b | 2017-07-13 15:10:08 +0200 | [diff] [blame] | 125 | |
Simon Glass | 7613579 | 2017-05-17 08:23:05 -0600 | [diff] [blame] | 126 | #endif /* !__ASSEMBLY__ */ |
| 127 | |
Simon Glass | 243182c | 2017-05-17 08:23:06 -0600 | [diff] [blame] | 128 | #ifdef CONFIG_PPC |
| 129 | /* |
| 130 | * Has to be included outside of the #ifndef __ASSEMBLY__ section. |
| 131 | * Otherwise might lead to compilation errors in assembler files. |
| 132 | */ |
| 133 | #include <asm/cache.h> |
| 134 | #endif |
| 135 | |
Simon Glass | 7613579 | 2017-05-17 08:23:05 -0600 | [diff] [blame] | 136 | #endif |