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git01.mediatek.com / filogic / uboot / ed9cf1fafa01b3913561b668092a0bc651e10fd1 / . / configs / zynq_zc702_defconfig
blob: d1740a751be8315473db558d56dd23ab545e648f [file] [log] [blame]
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ZYNQ=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]3CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]4CONFIG_SPL=y
5CONFIG_FIT=y
6CONFIG_FIT_VERBOSE=y
7CONFIG_FIT_SIGNATURE=y
Siva Durga Prasad Paladugu59d461e2016-01-11 12:01:10 +0530[diff] [blame]8CONFIG_SYS_PROMPT="Zynq> "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]9# CONFIG_CMD_IMLS is not set
10# CONFIG_CMD_FLASH is not set
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]11CONFIG_CMD_GPIO=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]12# CONFIG_CMD_SETEXPR is not set
Masahiro Yamada88e2e362015-07-17 20:26:06 +0900[diff] [blame]13CONFIG_NET_RANDOM_ETHADDR=y
Nathan Rossidd71c8a2016-01-08 03:00:46 +1000[diff] [blame]14CONFIG_SPL_DM_SEQ_ALIAS=y
Michal Simek90770fe2016-02-04 11:43:40 +0100[diff] [blame]15CONFIG_ZYNQ_SDHCI=y
Jagan Teki083a2f52015-08-31 17:36:03 +0530[diff] [blame]16CONFIG_SPI_FLASH=y
Michal Simekd4b2f102016-01-12 13:44:29 +0100[diff] [blame]17CONFIG_SPI_FLASH_BAR=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]18CONFIG_SPI_FLASH_SPANSION=y
19CONFIG_SPI_FLASH_STMICRO=y
20CONFIG_SPI_FLASH_WINBOND=y
Michal Simek3d7285f2015-11-30 14:34:52 +0100[diff] [blame]21CONFIG_ZYNQ_GEM=y
Michal Simek669bd682015-12-01 08:41:17 +0100[diff] [blame]22CONFIG_DEBUG_UART=y
23CONFIG_DEBUG_UART_ZYNQ=y
24CONFIG_DEBUG_UART_BASE=0xe0001000
25CONFIG_DEBUG_UART_CLOCK=50000000
Jagan Tekic6dca132015-08-31 17:38:40 +0530[diff] [blame]26CONFIG_ZYNQ_QSPI=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]27CONFIG_USB=y
28CONFIG_USB_GADGET=y