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git01.mediatek.com / filogic / uboot / ed70c8ff17354fd6da7cecee8a78a99475c62842 / . / board / freescale / m5282evb / u-boot.lds
blob: 35d669c442880e961977c0e712323cd4a36a6d7c [file] [log] [blame]
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]1/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(m68k)
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]25
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]26SECTIONS
27{
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]28 .text :
29 {
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]30 arch/m68k/cpu/mcf52x2/start.o (.text*)
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]31
Jason Jinffe2f322012-10-16 16:40:34 +0800[diff] [blame]32 . = DEFINED(env_offset) ? env_offset : .;
33 common/env_embedded.o (.text*)
34
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]35 *(.text*)
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]36 }
37 _etext = .;
38 PROVIDE (etext = .);
39 .rodata :
40 {
Trent Piepho4438e5e2009-02-18 15:22:05 -0800[diff] [blame]41 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]42 }
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]43
44 /* Read-write section, merged into data segment: */
45 . = (. + 0x00FF) & 0xFFFFFF00;
46 _erotext = .;
47 PROVIDE (erotext = .);
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]48
49 .reloc :
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]50 {
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]51 __got_start = .;
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]52 KEEP(*(.got))
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]53 __got_end = .;
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]54 _GOT2_TABLE_ = .;
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]55 KEEP(*(.got2))
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]56 _FIXUP_TABLE_ = .;
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]57 KEEP(*(.fixup))
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]58 }
59 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
60 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
61
62 .data :
63 {
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]64 *(.data*)
65 *(.sdata*)
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]66 }
67 _edata = .;
68 PROVIDE (edata = .);
69
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]70 . = .;
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]71
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]72 . = ALIGN(4);
73 .u_boot_list : {
74 #include <u-boot.lst>
75 }
76
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]77 . = .;
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]78 __start___ex_table = .;
79 __ex_table : { *(__ex_table) }
80 __stop___ex_table = .;
81
82 . = ALIGN(256);
83 __init_begin = .;
84 .text.init : { *(.text.init) }
85 .data.init : { *(.data.init) }
86 . = ALIGN(256);
87 __init_end = .;
88
89 __bss_start = .;
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]90 .bss (NOLOAD) :
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]91 {
92 _sbss = .;
stany MARCEL4df9e532011-10-14 04:38:01 +0000[diff] [blame]93 *(.bss*)
94 *(.sbss*)
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]95 *(COMMON)
96 . = ALIGN(4);
97 _ebss = .;
98 }
Simon Glassed70c8f2013-03-14 06:54:53 +0000[diff] [blame^]99 __bss_end = . ;
wdenkabf7a7c2003-12-08 01:34:36 +0000[diff] [blame]100 PROVIDE (end = .);
101}