blob: 54ac01d3620de1b30919c035eedc7a0cf0f6c44e [file] [log] [blame]
wdenk5b1d7132002-11-03 00:07:02 +00001/*
2 * (C) Copyright 2000 - 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
Wolfgang Denkf3f45182005-11-25 16:38:03 +010019 *
20 ********************************************************************
21 * NOTE: This header file defines an interface to U-Boot. Including
22 * this (unmodified) header file in another file is considered normal
23 * use of U-Boot, and does *not* fall under the heading of "derived
24 * work".
25 ********************************************************************
wdenk5b1d7132002-11-03 00:07:02 +000026 */
27
28#ifndef __U_BOOT_H__
29#define __U_BOOT_H__
30
31/*
32 * Board information passed to Linux kernel from U-Boot
33 *
34 * include/asm-ppc/u-boot.h
35 */
36
37#ifndef __ASSEMBLY__
wdenk5b1d7132002-11-03 00:07:02 +000038
39typedef struct bd_info {
40 unsigned long bi_memstart; /* start of DRAM memory */
Becky Brucea36601e2008-06-09 20:37:16 -050041 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
wdenk5b1d7132002-11-03 00:07:02 +000042 unsigned long bi_flashstart; /* start of FLASH memory */
43 unsigned long bi_flashsize; /* size of FLASH memory */
44 unsigned long bi_flashoffset; /* reserved area for startup monitor */
45 unsigned long bi_sramstart; /* start of SRAM memory */
46 unsigned long bi_sramsize; /* size of SRAM memory */
wdenk9c53f402003-10-15 23:53:47 +000047#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
Jon Loeliger5c8aa972006-04-26 17:58:56 -050048 || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
wdenk5b1d7132002-11-03 00:07:02 +000049 unsigned long bi_immr_base; /* base of IMMR register */
50#endif
wdenkbe9c1cb2004-02-24 02:00:03 +000051#if defined(CONFIG_MPC5xxx)
wdenk21136db2003-07-16 21:53:01 +000052 unsigned long bi_mbar_base; /* base of internal registers */
53#endif
Eran Liberty9095d4a2005-07-28 10:08:46 -050054#if defined(CONFIG_MPC83XX)
55 unsigned long bi_immrbar;
56#endif
wdenk337f5652004-10-28 00:09:35 +000057#if defined(CONFIG_MPC8220)
58 unsigned long bi_mbar_base; /* base of internal registers */
59 unsigned long bi_inpfreq; /* Input Freq, In MHz */
60 unsigned long bi_pcifreq; /* PCI Freq, in MHz */
61 unsigned long bi_pevfreq; /* PEV Freq, in MHz */
62 unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */
63 unsigned long bi_vcofreq; /* VCO Freq, in MHz */
64#endif
wdenk5b1d7132002-11-03 00:07:02 +000065 unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
66 unsigned long bi_ip_addr; /* IP Address */
67 unsigned char bi_enetaddr[6]; /* Ethernet adress */
68 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
69 unsigned long bi_intfreq; /* Internal Freq, in MHz */
70 unsigned long bi_busfreq; /* Bus Freq, in MHz */
Jon Loeligerf5ad3782005-07-23 10:37:35 -050071#if defined(CONFIG_CPM2)
wdenk5b1d7132002-11-03 00:07:02 +000072 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
73 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
74 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
75 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
76#endif
Grzegorz Bernackiaf554d82008-01-08 17:16:15 +010077#if defined(CONFIG_MPC512X)
78 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
79#endif /* CONFIG_MPC512X */
wdenkbe9c1cb2004-02-24 02:00:03 +000080#if defined(CONFIG_MPC5xxx)
wdenk21136db2003-07-16 21:53:01 +000081 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
82 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
83#endif
wdenk5b1d7132002-11-03 00:07:02 +000084 unsigned long bi_baudrate; /* Console Baudrate */
wdenk232fe0b2003-09-02 22:48:03 +000085#if defined(CONFIG_405) || \
86 defined(CONFIG_405GP) || \
wdenk5b1d7132002-11-03 00:07:02 +000087 defined(CONFIG_405CR) || \
wdenk232fe0b2003-09-02 22:48:03 +000088 defined(CONFIG_405EP) || \
Stefan Roese17ffbc82007-03-21 13:38:59 +010089 defined(CONFIG_405EZ) || \
Stefan Roese153b3e22007-10-05 17:10:59 +020090 defined(CONFIG_405EX) || \
wdenk232fe0b2003-09-02 22:48:03 +000091 defined(CONFIG_440)
wdenk5b1d7132002-11-03 00:07:02 +000092 unsigned char bi_s_version[4]; /* Version of this structure */
Wolfgang Denk0ee70772005-09-23 11:05:55 +020093 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
wdenk5b1d7132002-11-03 00:07:02 +000094 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
95 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
96 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
97 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
98#endif
99#if defined(CONFIG_HYMOD)
100 hymod_conf_t bi_hymod_conf; /* hymod configuration information */
101#endif
wdenk0aeb8532004-10-10 21:21:55 +0000102
wdenk54070ab2004-12-31 09:32:47 +0000103#ifdef CONFIG_HAS_ETH1
wdenk5b1d7132002-11-03 00:07:02 +0000104 /* second onboard ethernet port */
105 unsigned char bi_enet1addr[6];
106#endif
wdenk54070ab2004-12-31 09:32:47 +0000107#ifdef CONFIG_HAS_ETH2
wdenk5b1d7132002-11-03 00:07:02 +0000108 /* third onboard ethernet port */
109 unsigned char bi_enet2addr[6];
110#endif
wdenk54070ab2004-12-31 09:32:47 +0000111#ifdef CONFIG_HAS_ETH3
wdenk544e9732004-02-06 23:19:44 +0000112 unsigned char bi_enet3addr[6];
113#endif
wdenk0aeb8532004-10-10 21:21:55 +0000114
Stefan Roese17ffbc82007-03-21 13:38:59 +0100115#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
116 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
Stefan Roese42fbddd2006-09-07 11:51:23 +0200117 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
Stefan Roese50c05332008-03-11 15:07:10 +0100118 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
119 defined(CONFIG_460EX) || defined(CONFIG_460GT)
wdenkc6abb7e2003-11-17 21:14:37 +0000120 unsigned int bi_opbfreq; /* OPB clock in Hz */
121 int bi_iic_fast[2]; /* Use fast i2c mode */
122#endif
wdenk5b1d7132002-11-03 00:07:02 +0000123#if defined(CONFIG_NX823)
124 unsigned char bi_sernum[8];
125#endif
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200126#if defined(CONFIG_4xx)
Stefan Roese50c05332008-03-11 15:07:10 +0100127#if defined(CONFIG_440GX) || \
128 defined(CONFIG_460EX) || defined(CONFIG_460GT)
Wolfgang Denka1be4762008-05-20 16:00:29 +0200129 int bi_phynum[4]; /* Determines phy mapping */
130 int bi_phymode[4]; /* Determines phy mode */
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200131#elif defined(CONFIG_405EP) || defined(CONFIG_440)
Wolfgang Denka1be4762008-05-20 16:00:29 +0200132 int bi_phynum[2]; /* Determines phy mapping */
133 int bi_phymode[2]; /* Determines phy mode */
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200134#else
Wolfgang Denka1be4762008-05-20 16:00:29 +0200135 int bi_phynum[1]; /* Determines phy mapping */
136 int bi_phymode[1]; /* Determines phy mode */
wdenk56ed43e2004-02-22 23:46:08 +0000137#endif
Stefan Roese0c7ffc02005-08-16 18:18:00 +0200138#endif /* defined(CONFIG_4xx) */
wdenk5b1d7132002-11-03 00:07:02 +0000139} bd_t;
140
141#endif /* __ASSEMBLY__ */
142#endif /* __U_BOOT_H__ */