blob: 33589347da3fc92dcdbcaebcf02f1840bbfc5133 [file] [log] [blame]
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Xilinx, Inc.
4 */
5
6#include <common.h>
Simon Glassed38aef2020-05-10 11:40:03 -06007#include <command.h>
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +05308#include <asm/io.h>
9#include <asm/arch/hardware.h>
10#include <asm/arch/sys_proto.h>
11#include <malloc.h>
12#include <u-boot/md5.h>
13#include <u-boot/rsa.h>
14#include <u-boot/rsa-mod-exp.h>
15#include <u-boot/sha256.h>
16#include <zynqpl.h>
17#include <fpga.h>
18#include <zynq_bootimg.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22#ifdef CONFIG_CMD_ZYNQ_RSA
23
24#define ZYNQ_EFUSE_RSA_ENABLE_MASK 0x400
25#define ZYNQ_ATTRIBUTE_PL_IMAGE_MASK 0x20
26#define ZYNQ_ATTRIBUTE_CHECKSUM_TYPE_MASK 0x7000
27#define ZYNQ_ATTRIBUTE_RSA_PRESENT_MASK 0x8000
28#define ZYNQ_ATTRIBUTE_RSA_PART_OWNER_MASK 0x30000
29
30#define ZYNQ_RSA_MODULAR_SIZE 256
31#define ZYNQ_RSA_MODULAR_EXT_SIZE 256
32#define ZYNQ_RSA_EXPO_SIZE 64
33#define ZYNQ_RSA_SPK_SIGNATURE_SIZE 256
34#define ZYNQ_RSA_PARTITION_SIGNATURE_SIZE 256
35#define ZYNQ_RSA_SIGNATURE_SIZE 0x6C0
36#define ZYNQ_RSA_HEADER_SIZE 4
37#define ZYNQ_RSA_MAGIC_WORD_SIZE 60
38#define ZYNQ_RSA_PART_OWNER_UBOOT 1
39#define ZYNQ_RSA_ALIGN_PPK_START 64
40
41#define WORD_LENGTH_SHIFT 2
42
43static u8 *ppkmodular;
44static u8 *ppkmodularex;
45
46struct zynq_rsa_public_key {
47 uint len; /* Length of modulus[] in number of u32 */
48 u32 n0inv; /* -1 / modulus[0] mod 2^32 */
49 u32 *modulus; /* modulus as little endian array */
50 u32 *rr; /* R^2 as little endian array */
51};
52
53static struct zynq_rsa_public_key public_key;
54
55static struct partition_hdr part_hdr[ZYNQ_MAX_PARTITION_NUMBER];
56
57/*
58 * Extract the primary public key components from already autheticated FSBL
59 */
60static void zynq_extract_ppk(u32 fsbl_len)
61{
62 u32 padsize;
63 u8 *ppkptr;
64
65 debug("%s\n", __func__);
66
67 /*
68 * Extract the authenticated PPK from OCM i.e at end of the FSBL
69 */
70 ppkptr = (u8 *)(fsbl_len + ZYNQ_OCM_BASEADDR);
71 padsize = ((u32)ppkptr % ZYNQ_RSA_ALIGN_PPK_START);
72 if (padsize)
73 ppkptr += (ZYNQ_RSA_ALIGN_PPK_START - padsize);
74
75 ppkptr += ZYNQ_RSA_HEADER_SIZE;
76
77 ppkptr += ZYNQ_RSA_MAGIC_WORD_SIZE;
78
79 ppkmodular = (u8 *)ppkptr;
80 ppkptr += ZYNQ_RSA_MODULAR_SIZE;
81 ppkmodularex = (u8 *)ppkptr;
82 ppkptr += ZYNQ_RSA_MODULAR_EXT_SIZE;
83}
84
85/*
86 * Calculate the inverse(-1 / modulus[0] mod 2^32 ) for the PPK
87 */
88static u32 zynq_calc_inv(void)
89{
90 u32 modulus = public_key.modulus[0];
91 u32 tmp = BIT(1);
92 u32 inverse;
93
94 inverse = modulus & BIT(0);
95
96 while (tmp) {
97 inverse *= 2 - modulus * inverse;
98 tmp *= tmp;
99 }
100
101 return ~(inverse - 1);
102}
103
104/*
105 * Recreate the signature by padding the bytes and verify with hash value
106 */
107static int zynq_pad_and_check(u8 *signature, u8 *hash)
108{
109 u8 padding[] = {0x30, 0x31, 0x30, 0x0D, 0x06, 0x09, 0x60, 0x86, 0x48,
110 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04,
111 0x20};
112 u8 *pad_ptr = signature + 256;
113 u32 pad = 202;
114 u32 ii;
115
116 /*
117 * Re-Create PKCS#1v1.5 Padding
118 * MSB ----------------------------------------------------LSB
119 * 0x0 || 0x1 || 0xFF(for 202 bytes) || 0x0 || T_padding || SHA256 Hash
120 */
121 if (*--pad_ptr != 0 || *--pad_ptr != 1)
122 return -1;
123
124 for (ii = 0; ii < pad; ii++) {
125 if (*--pad_ptr != 0xFF)
126 return -1;
127 }
128
129 if (*--pad_ptr != 0)
130 return -1;
131
132 for (ii = 0; ii < sizeof(padding); ii++) {
133 if (*--pad_ptr != padding[ii])
134 return -1;
135 }
136
137 for (ii = 0; ii < 32; ii++) {
138 if (*--pad_ptr != hash[ii])
139 return -1;
140 }
141 return 0;
142}
143
144/*
145 * Verify and extract the hash value from signature using the public key
146 * and compare it with calculated hash value.
147 */
148static int zynq_rsa_verify_key(const struct zynq_rsa_public_key *key,
149 const u8 *sig, const u32 sig_len, const u8 *hash)
150{
151 int status;
152 void *buf;
153
154 if (!key || !sig || !hash)
155 return -1;
156
157 if (sig_len != (key->len * sizeof(u32))) {
158 printf("Signature is of incorrect length %d\n", sig_len);
159 return -1;
160 }
161
162 /* Sanity check for stack size */
163 if (sig_len > ZYNQ_RSA_SPK_SIGNATURE_SIZE) {
164 printf("Signature length %u exceeds maximum %d\n", sig_len,
165 ZYNQ_RSA_SPK_SIGNATURE_SIZE);
166 return -1;
167 }
168
169 buf = malloc(sig_len);
170 if (!buf)
171 return -1;
172
173 memcpy(buf, sig, sig_len);
174
175 status = zynq_pow_mod((u32 *)key, (u32 *)buf);
176 if (status == -1) {
177 free(buf);
178 return status;
179 }
180
181 status = zynq_pad_and_check((u8 *)buf, (u8 *)hash);
182
183 free(buf);
184 return status;
185}
186
187/*
188 * Authenticate the partition
189 */
190static int zynq_authenticate_part(u8 *buffer, u32 size)
191{
192 u8 hash_signature[32];
193 u8 *spk_modular;
194 u8 *spk_modular_ex;
195 u8 *signature_ptr;
196 u32 status;
197
198 debug("%s\n", __func__);
199
200 signature_ptr = (u8 *)(buffer + size - ZYNQ_RSA_SIGNATURE_SIZE);
201
202 signature_ptr += ZYNQ_RSA_HEADER_SIZE;
203
204 signature_ptr += ZYNQ_RSA_MAGIC_WORD_SIZE;
205
206 ppkmodular = (u8 *)signature_ptr;
207 signature_ptr += ZYNQ_RSA_MODULAR_SIZE;
208 ppkmodularex = signature_ptr;
209 signature_ptr += ZYNQ_RSA_MODULAR_EXT_SIZE;
210 signature_ptr += ZYNQ_RSA_EXPO_SIZE;
211
212 sha256_csum_wd((const unsigned char *)signature_ptr,
213 (ZYNQ_RSA_MODULAR_EXT_SIZE + ZYNQ_RSA_EXPO_SIZE +
214 ZYNQ_RSA_MODULAR_SIZE),
215 (unsigned char *)hash_signature, 0x1000);
216
217 spk_modular = (u8 *)signature_ptr;
218 signature_ptr += ZYNQ_RSA_MODULAR_SIZE;
219 spk_modular_ex = (u8 *)signature_ptr;
220 signature_ptr += ZYNQ_RSA_MODULAR_EXT_SIZE;
221 signature_ptr += ZYNQ_RSA_EXPO_SIZE;
222
223 public_key.len = ZYNQ_RSA_MODULAR_SIZE / sizeof(u32);
224 public_key.modulus = (u32 *)ppkmodular;
225 public_key.rr = (u32 *)ppkmodularex;
226 public_key.n0inv = zynq_calc_inv();
227
228 status = zynq_rsa_verify_key(&public_key, signature_ptr,
229 ZYNQ_RSA_SPK_SIGNATURE_SIZE,
230 hash_signature);
231 if (status)
232 return status;
233
234 signature_ptr += ZYNQ_RSA_SPK_SIGNATURE_SIZE;
235
236 sha256_csum_wd((const unsigned char *)buffer,
237 (size - ZYNQ_RSA_PARTITION_SIGNATURE_SIZE),
238 (unsigned char *)hash_signature, 0x1000);
239
240 public_key.len = ZYNQ_RSA_MODULAR_SIZE / sizeof(u32);
241 public_key.modulus = (u32 *)spk_modular;
242 public_key.rr = (u32 *)spk_modular_ex;
243 public_key.n0inv = zynq_calc_inv();
244
245 return zynq_rsa_verify_key(&public_key, (u8 *)signature_ptr,
246 ZYNQ_RSA_PARTITION_SIGNATURE_SIZE,
247 (u8 *)hash_signature);
248}
249
250/*
251 * Parses the partition header and verfies the authenticated and
252 * encrypted image.
253 */
254static int zynq_verify_image(u32 src_ptr)
255{
256 u32 silicon_ver, image_base_addr, status;
257 u32 partition_num = 0;
258 u32 efuseval, srcaddr, size, fsbl_len;
259 struct partition_hdr *hdr_ptr;
260 u32 part_data_len, part_img_len, part_attr;
261 u32 part_load_addr, part_dst_addr, part_chksum_offset;
262 u32 part_start_addr, part_total_size, partitioncount;
263 bool encrypt_part_flag = false;
264 bool part_chksum_flag = false;
265 bool signed_part_flag = false;
266
267 image_base_addr = src_ptr;
268
269 silicon_ver = zynq_get_silicon_version();
270
271 /* RSA not supported in silicon versions 1.0 and 2.0 */
272 if (silicon_ver == 0 || silicon_ver == 1)
273 return -1;
274
275 zynq_get_partition_info(image_base_addr, &fsbl_len,
276 &part_hdr[0]);
277
278 /* Extract ppk if efuse was blown Otherwise return error */
279 efuseval = readl(&efuse_base->status);
280 if (!(efuseval & ZYNQ_EFUSE_RSA_ENABLE_MASK))
281 return -1;
282
283 zynq_extract_ppk(fsbl_len);
284
285 partitioncount = zynq_get_part_count(&part_hdr[0]);
286
287 /*
288 * As the first two partitions are related to fsbl,
289 * we can ignore those two in bootimage and the below
290 * code doesn't need to validate it as fsbl is already
291 * done by now
292 */
293 if (partitioncount <= 2 ||
294 partitioncount > ZYNQ_MAX_PARTITION_NUMBER)
295 return -1;
296
297 while (partition_num < partitioncount) {
298 if (((part_hdr[partition_num].partitionattr &
299 ZYNQ_ATTRIBUTE_RSA_PART_OWNER_MASK) >> 16) !=
300 ZYNQ_RSA_PART_OWNER_UBOOT) {
301 printf("UBOOT is not Owner for partition %d\n",
302 partition_num);
303 partition_num++;
304 continue;
305 }
306 hdr_ptr = &part_hdr[partition_num];
307 status = zynq_validate_hdr(hdr_ptr);
308 if (status)
309 return status;
310
311 part_data_len = hdr_ptr->datawordlen;
312 part_img_len = hdr_ptr->imagewordlen;
313 part_attr = hdr_ptr->partitionattr;
314 part_load_addr = hdr_ptr->loadaddr;
315 part_chksum_offset = hdr_ptr->checksumoffset;
316 part_start_addr = hdr_ptr->partitionstart;
317 part_total_size = hdr_ptr->partitionwordlen;
318
319 if (part_data_len != part_img_len) {
320 debug("Encrypted\n");
321 encrypt_part_flag = true;
322 }
323
324 if (part_attr & ZYNQ_ATTRIBUTE_CHECKSUM_TYPE_MASK)
325 part_chksum_flag = true;
326
327 if (part_attr & ZYNQ_ATTRIBUTE_RSA_PRESENT_MASK) {
328 debug("RSA Signed\n");
329 signed_part_flag = true;
330 size = part_total_size << WORD_LENGTH_SHIFT;
331 } else {
332 size = part_img_len;
333 }
334
335 if (!signed_part_flag && !part_chksum_flag) {
336 printf("Partition not signed & no chksum\n");
337 partition_num++;
338 continue;
339 }
340
341 srcaddr = image_base_addr +
342 (part_start_addr << WORD_LENGTH_SHIFT);
343
344 /*
345 * This validation is just for PS DDR.
346 * TODO: Update this for PL DDR check as well.
347 */
348 if (part_load_addr < gd->bd->bi_dram[0].start &&
349 ((part_load_addr + part_data_len) >
350 (gd->bd->bi_dram[0].start +
351 gd->bd->bi_dram[0].size))) {
352 printf("INVALID_LOAD_ADDRESS_FAIL\n");
353 return -1;
354 }
355
356 if (part_attr & ZYNQ_ATTRIBUTE_PL_IMAGE_MASK)
357 part_load_addr = srcaddr;
358 else
359 memcpy((u32 *)part_load_addr, (u32 *)srcaddr,
360 size);
361
362 if (part_chksum_flag) {
363 part_chksum_offset = image_base_addr +
364 (part_chksum_offset <<
365 WORD_LENGTH_SHIFT);
366 status = zynq_validate_partition(part_load_addr,
367 (part_total_size <<
368 WORD_LENGTH_SHIFT),
369 part_chksum_offset);
370 if (status != 0) {
371 printf("PART_CHKSUM_FAIL\n");
372 return -1;
373 }
374 debug("Partition Validation Done\n");
375 }
376
377 if (signed_part_flag) {
378 status = zynq_authenticate_part((u8 *)part_load_addr,
379 size);
380 if (status != 0) {
381 printf("AUTHENTICATION_FAIL\n");
382 return -1;
383 }
384 debug("Authentication Done\n");
385 }
386
387 if (encrypt_part_flag) {
388 debug("DECRYPTION\n");
389
390 part_dst_addr = part_load_addr;
391
392 if (part_attr & ZYNQ_ATTRIBUTE_PL_IMAGE_MASK) {
393 partition_num++;
394 continue;
395 }
396
397 status = zynq_decrypt_load(part_load_addr,
398 part_img_len,
399 part_dst_addr,
400 part_data_len);
401 if (status != 0) {
402 printf("DECRYPTION_FAIL\n");
403 return -1;
404 }
405 }
406 partition_num++;
407 }
408
409 return 0;
410}
411
Simon Glassed38aef2020-05-10 11:40:03 -0600412static int do_zynq_rsa(struct cmd_tbl *cmdtp, int flag, int argc,
413 char *const argv[])
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530414{
415 u32 src_ptr;
416 char *endp;
417
T Karthik Reddy8fafec82019-03-12 20:20:21 +0530418 if (argc != cmdtp->maxargs)
419 return CMD_RET_FAILURE;
420
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530421 src_ptr = simple_strtoul(argv[2], &endp, 16);
422 if (*argv[2] == 0 || *endp != 0)
423 return CMD_RET_USAGE;
T Karthik Reddy8fafec82019-03-12 20:20:21 +0530424
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530425 if (zynq_verify_image(src_ptr))
426 return CMD_RET_FAILURE;
427
428 return CMD_RET_SUCCESS;
429}
430#endif
431
432#ifdef CONFIG_CMD_ZYNQ_AES
Simon Glassed38aef2020-05-10 11:40:03 -0600433static int zynq_decrypt_image(struct cmd_tbl *cmdtp, int flag, int argc,
434 char *const argv[])
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530435{
436 char *endp;
437 u32 srcaddr, srclen, dstaddr, dstlen;
438 int status;
439
T Karthik Reddy8fafec82019-03-12 20:20:21 +0530440 if (argc < 5 && argc > cmdtp->maxargs)
441 return CMD_RET_USAGE;
442
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530443 srcaddr = simple_strtoul(argv[2], &endp, 16);
444 if (*argv[2] == 0 || *endp != 0)
445 return CMD_RET_USAGE;
446 srclen = simple_strtoul(argv[3], &endp, 16);
447 if (*argv[3] == 0 || *endp != 0)
448 return CMD_RET_USAGE;
449 dstaddr = simple_strtoul(argv[4], &endp, 16);
450 if (*argv[4] == 0 || *endp != 0)
451 return CMD_RET_USAGE;
452 dstlen = simple_strtoul(argv[5], &endp, 16);
453 if (*argv[5] == 0 || *endp != 0)
454 return CMD_RET_USAGE;
455
456 /*
457 * Roundup source and destination lengths to
458 * word size
459 */
460 if (srclen % 4)
461 srclen = roundup(srclen, 4);
462 if (dstlen % 4)
463 dstlen = roundup(dstlen, 4);
464
465 status = zynq_decrypt_load(srcaddr, srclen >> 2, dstaddr, dstlen >> 2);
466 if (status != 0)
467 return CMD_RET_FAILURE;
468
469 return CMD_RET_SUCCESS;
470}
471#endif
472
Simon Glassed38aef2020-05-10 11:40:03 -0600473static struct cmd_tbl zynq_commands[] = {
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530474#ifdef CONFIG_CMD_ZYNQ_RSA
475 U_BOOT_CMD_MKENT(rsa, 3, 1, do_zynq_rsa, "", ""),
476#endif
477#ifdef CONFIG_CMD_ZYNQ_AES
478 U_BOOT_CMD_MKENT(aes, 6, 1, zynq_decrypt_image, "", ""),
479#endif
480};
481
Simon Glassed38aef2020-05-10 11:40:03 -0600482static int do_zynq(struct cmd_tbl *cmdtp, int flag, int argc,
483 char *const argv[])
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530484{
Simon Glassed38aef2020-05-10 11:40:03 -0600485 struct cmd_tbl *zynq_cmd;
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530486 int ret;
487
488 if (!ARRAY_SIZE(zynq_commands)) {
489 puts("No zynq specific command enabled\n");
490 return CMD_RET_USAGE;
491 }
492
493 if (argc < 2)
494 return CMD_RET_USAGE;
495 zynq_cmd = find_cmd_tbl(argv[1], zynq_commands,
496 ARRAY_SIZE(zynq_commands));
T Karthik Reddy8fafec82019-03-12 20:20:21 +0530497 if (!zynq_cmd)
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530498 return CMD_RET_USAGE;
499
500 ret = zynq_cmd->cmd(zynq_cmd, flag, argc, argv);
501
502 return cmd_process_error(zynq_cmd, ret);
503}
504
Michal Simek29a78592018-11-19 15:46:04 +0100505#ifdef CONFIG_SYS_LONGHELP
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530506static char zynq_help_text[] =
507 ""
508#ifdef CONFIG_CMD_ZYNQ_RSA
509 "rsa <baseaddr> - Verifies the authenticated and encrypted\n"
510 " zynq images and loads them back to load\n"
511 " addresses as specified in BOOT image(BOOT.BIN)\n"
512#endif
513#ifdef CONFIG_CMD_ZYNQ_AES
514 "aes <srcaddr> <srclen> <dstaddr> <dstlen>\n"
515 " - Decrypts the encrypted image present in source\n"
516 " address and places the decrypted image at\n"
517 " destination address\n"
518#endif
519 ;
Michal Simek29a78592018-11-19 15:46:04 +0100520#endif
Siva Durga Prasad Paladugue4603522018-06-26 15:02:19 +0530521
522U_BOOT_CMD(zynq, 6, 0, do_zynq,
523 "Zynq specific commands", zynq_help_text
524);