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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Matthias Weisser82001ef2011-07-06 00:28:33 +00002/*
3 * (c) 2011 Graf-Syteco, Matthias Weisser
4 * <weisserm@arcor.de>
5 *
6 * Based on tx25.c:
7 * (C) Copyright 2009 DENX Software Engineering
8 * Author: John Rigby <jrigby@gmail.com>
9 *
10 * Based on imx27lite.c:
11 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
12 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
13 * And:
14 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
Matthias Weisser82001ef2011-07-06 00:28:33 +000015 */
16#include <common.h>
Simon Glass1d91ba72019-11-14 12:57:37 -070017#include <cpu_func.h>
Simon Glassed38aef2020-05-10 11:40:03 -060018#include <env.h>
Simon Glassa7b51302019-11-14 12:57:46 -070019#include <init.h>
Stefano Babicfde362f2011-08-21 10:55:05 +020020#include <asm/gpio.h>
Matthias Weisser82001ef2011-07-06 00:28:33 +000021#include <asm/io.h>
22#include <asm/arch/imx-regs.h>
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000023#include <asm/arch/iomux-mx25.h>
Matthias Weisser82001ef2011-07-06 00:28:33 +000024
25DECLARE_GLOBAL_DATA_PTR;
26
27int board_init()
28{
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000029 static const iomux_v3_cfg_t sdhc1_pads[] = {
30 NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
31 NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
32 NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
33 NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
34 NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
35 NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
36 };
Matthias Weisser82001ef2011-07-06 00:28:33 +000037
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000038 static const iomux_v3_cfg_t dig_out_pads[] = {
39 MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */
40 MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */
41 NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */
42 NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */
43 };
44
45 static const iomux_v3_cfg_t led_pads[] = {
46 MX25_PAD_CSI_D9__GPIO_4_21,
47 MX25_PAD_CSI_D4__GPIO_1_29,
48 };
49
50 static const iomux_v3_cfg_t can_pads[] = {
51 NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL),
52 NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL),
53 NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL),
54 NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL),
55 };
56
57 static const iomux_v3_cfg_t i2c3_pads[] = {
58 MX25_PAD_CSPI1_SS1__I2C3_DAT,
59 MX25_PAD_GPIO_E__I2C3_CLK,
60 };
Matthias Weisser82001ef2011-07-06 00:28:33 +000061
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000062 icache_enable();
Matthias Weisser82001ef2011-07-06 00:28:33 +000063
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000064 /* Setup of core voltage selection pin to run at 1.4V */
65 imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */
Stefano Babicfc05b902012-08-19 21:33:50 +000066 gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
Matthias Weisser82001ef2011-07-06 00:28:33 +000067
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000068 /* Setup of SD card pins*/
69 imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000070
71 /* Setup of digital output for USB power and OC */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000072 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */
Stefano Babicfc05b902012-08-19 21:33:50 +000073 gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
Matthias Weisser82001ef2011-07-06 00:28:33 +000074
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000075 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */
Stefano Babicfc05b902012-08-19 21:33:50 +000076 gpio_direction_input(IMX_GPIO_NR(1, 18));
Matthias Weisser82001ef2011-07-06 00:28:33 +000077
78 /* Setup of digital output control pins */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000079 imx_iomux_v3_setup_multiple_pads(dig_out_pads,
80 ARRAY_SIZE(dig_out_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000081
82 /* Switch both output drivers off */
Stefano Babicfc05b902012-08-19 21:33:50 +000083 gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
84 gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +000085
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000086 /* Setup of key input pin */
87 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0));
Stefano Babicfc05b902012-08-19 21:33:50 +000088 gpio_direction_input(IMX_GPIO_NR(2, 29));
Matthias Weisser82001ef2011-07-06 00:28:33 +000089
90 /* Setup of status LED outputs */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000091 imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000092
93 /* Switch both LEDs off */
Stefano Babicfc05b902012-08-19 21:33:50 +000094 gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
95 gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +000096
97 /* Setup of CAN1 and CAN2 signals */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000098 imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000099
100 /* Setup of I2C3 signals */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000101 imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +0000102
Matthias Weisser82001ef2011-07-06 00:28:33 +0000103 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
104
105 return 0;
106}
107
108int board_late_init(void)
109{
110 const char *e;
111
112#ifdef CONFIG_FEC_MXC
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000113/*
114 * FIXME: need to revisit this
115 * The original code enabled PUE and 100-k pull-down without PKE, so the right
116 * value here is likely:
117 * 0 for no pull
118 * or:
119 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
120 */
121#define FEC_OUT_PAD_CTRL 0
Matthias Weisser82001ef2011-07-06 00:28:33 +0000122
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000123 static const iomux_v3_cfg_t fec_pads[] = {
124 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
125 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
126 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
127 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
128 NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
129 NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
130 MX25_PAD_FEC_MDIO__FEC_MDIO,
131 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
132 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
Matthias Weisser82001ef2011-07-06 00:28:33 +0000133
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000134 MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */
135 MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */
136 };
Matthias Weisser82001ef2011-07-06 00:28:33 +0000137
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000138 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +0000139
140 /* assert PHY reset (low) */
Stefano Babicfc05b902012-08-19 21:33:50 +0000141 gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +0000142
143 udelay(5000);
144
145 /* deassert PHY reset */
Stefano Babicfc05b902012-08-19 21:33:50 +0000146 gpio_set_value(IMX_GPIO_NR(3, 16), 1);
Matthias Weisser82001ef2011-07-06 00:28:33 +0000147
148 udelay(5000);
149#endif
150
Simon Glass64b723f2017-08-03 12:22:12 -0600151 e = env_get("gs_base_board");
Matthias Weisser82001ef2011-07-06 00:28:33 +0000152 if (e != NULL) {
153 if (strcmp(e, "G283") == 0) {
Stefano Babicfc05b902012-08-19 21:33:50 +0000154 int key = gpio_get_value(IMX_GPIO_NR(2, 29));
Matthias Weisser82001ef2011-07-06 00:28:33 +0000155
156 if (key) {
157 /* Switch on both LEDs to inidcate boot mode */
Stefano Babicfc05b902012-08-19 21:33:50 +0000158 gpio_set_value(IMX_GPIO_NR(1, 29), 0);
159 gpio_set_value(IMX_GPIO_NR(4, 21), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +0000160
Simon Glass6a38e412017-08-03 12:22:09 -0600161 env_set("preboot", "run gs_slow_boot");
Matthias Weisser82001ef2011-07-06 00:28:33 +0000162 } else
Simon Glass6a38e412017-08-03 12:22:09 -0600163 env_set("preboot", "run gs_fast_boot");
Matthias Weisser82001ef2011-07-06 00:28:33 +0000164 }
165 }
166
167 return 0;
168}
169
170int dram_init(void)
171{
172 /* dram_init must store complete ramsize in gd->ram_size */
173 gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
174 PHYS_SDRAM_SIZE);
175 return 0;
176}