Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2012 Samsung Electronics |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #include <common.h> |
| 24 | #include <asm/io.h> |
| 25 | #include <netdev.h> |
| 26 | #include <asm/arch/cpu.h> |
| 27 | #include <asm/arch/gpio.h> |
| 28 | #include <asm/arch/mmc.h> |
| 29 | #include <asm/arch/sromc.h> |
| 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | struct exynos5_gpio_part1 *gpio1; |
| 33 | |
| 34 | int board_init(void) |
| 35 | { |
| 36 | gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); |
| 37 | |
| 38 | gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | int dram_init(void) |
| 43 | { |
| 44 | gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) |
| 45 | + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) |
| 46 | + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) |
| 47 | + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE) |
| 48 | + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE) |
| 49 | + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE) |
| 50 | + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE) |
| 51 | + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE); |
| 52 | return 0; |
| 53 | } |
| 54 | |
| 55 | void dram_init_banksize(void) |
| 56 | { |
| 57 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 58 | gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, |
| 59 | PHYS_SDRAM_1_SIZE); |
| 60 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
| 61 | gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, |
| 62 | PHYS_SDRAM_2_SIZE); |
| 63 | gd->bd->bi_dram[2].start = PHYS_SDRAM_3; |
| 64 | gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, |
| 65 | PHYS_SDRAM_3_SIZE); |
| 66 | gd->bd->bi_dram[3].start = PHYS_SDRAM_4; |
| 67 | gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, |
| 68 | PHYS_SDRAM_4_SIZE); |
| 69 | gd->bd->bi_dram[4].start = PHYS_SDRAM_5; |
| 70 | gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5, |
| 71 | PHYS_SDRAM_5_SIZE); |
| 72 | gd->bd->bi_dram[5].start = PHYS_SDRAM_6; |
| 73 | gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6, |
| 74 | PHYS_SDRAM_6_SIZE); |
| 75 | gd->bd->bi_dram[6].start = PHYS_SDRAM_7; |
| 76 | gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7, |
| 77 | PHYS_SDRAM_7_SIZE); |
| 78 | gd->bd->bi_dram[7].start = PHYS_SDRAM_8; |
| 79 | gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8, |
| 80 | PHYS_SDRAM_8_SIZE); |
| 81 | } |
| 82 | |
| 83 | #ifdef CONFIG_DISPLAY_BOARDINFO |
| 84 | int checkboard(void) |
| 85 | { |
| 86 | printf("\nBoard: SMDK5250\n"); |
| 87 | |
| 88 | return 0; |
| 89 | } |
| 90 | #endif |
| 91 | |
| 92 | #ifdef CONFIG_GENERIC_MMC |
| 93 | int board_mmc_init(bd_t *bis) |
| 94 | { |
| 95 | int i, err; |
| 96 | |
| 97 | /* |
| 98 | * MMC2 SD card GPIO: |
| 99 | * |
| 100 | * GPC2[0] SD_2_CLK(2) |
| 101 | * GPC2[1] SD_2_CMD(2) |
| 102 | * GPC2[2] SD_2_CDn |
| 103 | * GPC2[3:6] SD_2_DATA[0:3](2) |
| 104 | */ |
| 105 | for (i = 0; i < 7; i++) { |
| 106 | /* GPC2[0:6] special function 2 */ |
| 107 | s5p_gpio_cfg_pin(&gpio1->c2, i, GPIO_FUNC(0x2)); |
| 108 | |
| 109 | /* GPK2[0:6] drv 4x */ |
| 110 | s5p_gpio_set_drv(&gpio1->c2, i, GPIO_DRV_4X); |
| 111 | |
| 112 | /* GPK2[0:1] pull disable */ |
| 113 | if (i == 0 || i == 1) { |
| 114 | s5p_gpio_set_pull(&gpio1->c2, i, GPIO_PULL_NONE); |
| 115 | continue; |
| 116 | } |
| 117 | |
| 118 | /* GPK2[2:6] pull up */ |
| 119 | s5p_gpio_set_pull(&gpio1->c2, i, GPIO_PULL_UP); |
| 120 | } |
| 121 | |
| 122 | err = s5p_mmc_init(2, 4); |
| 123 | return err; |
| 124 | } |
| 125 | #endif |
| 126 | |
| 127 | static void board_uart_init(void) |
| 128 | { |
| 129 | struct exynos5_gpio_part1 *gpio1 = |
| 130 | (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); |
| 131 | int i; |
| 132 | |
| 133 | /* UART1 GPIOs (part1) : GPA0CON[7:4] 0x2222 */ |
| 134 | for (i = 4; i < 8; i++) { |
| 135 | s5p_gpio_set_pull(&gpio1->a0, i, GPIO_PULL_NONE); |
| 136 | s5p_gpio_cfg_pin(&gpio1->a0, i, GPIO_FUNC(0x2)); |
| 137 | } |
| 138 | } |
| 139 | |
| 140 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
| 141 | int board_early_init_f(void) |
| 142 | { |
| 143 | board_uart_init(); |
| 144 | return 0; |
| 145 | } |
| 146 | #endif |