Michal Simek | 090a2d7 | 2018-03-27 10:36:39 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 2 | /* |
3 | * dts file for Xilinx ZynqMP zc1751-xm018-dc4 | ||||
4 | * | ||||
Michal Simek | e0afb5a | 2021-06-01 16:42:02 +0200 | [diff] [blame] | 5 | * (C) Copyright 2015 - 2021, Xilinx, Inc. |
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 6 | * |
7 | * Michal Simek <michal.simek@xilinx.com> | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 8 | */ |
9 | |||||
10 | /dts-v1/; | ||||
11 | |||||
12 | #include "zynqmp.dtsi" | ||||
Michal Simek | a6604b6 | 2017-12-08 14:50:42 +0100 | [diff] [blame] | 13 | #include "zynqmp-clk-ccf.dtsi" |
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 14 | |
15 | / { | ||||
16 | model = "ZynqMP zc1751-xm018-dc4"; | ||||
17 | compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; | ||||
18 | |||||
19 | aliases { | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 20 | ethernet0 = &gem0; |
21 | ethernet1 = &gem1; | ||||
22 | ethernet2 = &gem2; | ||||
23 | ethernet3 = &gem3; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 24 | i2c0 = &i2c0; |
25 | i2c1 = &i2c1; | ||||
26 | rtc0 = &rtc; | ||||
27 | serial0 = &uart0; | ||||
28 | serial1 = &uart1; | ||||
29 | spi0 = &qspi; | ||||
30 | }; | ||||
31 | |||||
32 | chosen { | ||||
33 | bootargs = "earlycon"; | ||||
34 | stdout-path = "serial0:115200n8"; | ||||
35 | }; | ||||
36 | |||||
Michal Simek | 79c1cbf | 2016-11-11 13:21:04 +0100 | [diff] [blame] | 37 | memory@0 { |
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 38 | device_type = "memory"; |
39 | reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; | ||||
40 | }; | ||||
41 | }; | ||||
42 | |||||
43 | &can0 { | ||||
44 | status = "okay"; | ||||
45 | }; | ||||
46 | |||||
47 | &can1 { | ||||
48 | status = "okay"; | ||||
49 | }; | ||||
50 | |||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 51 | &fpd_dma_chan1 { |
52 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 53 | }; |
54 | |||||
55 | &fpd_dma_chan2 { | ||||
56 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 57 | }; |
58 | |||||
59 | &fpd_dma_chan3 { | ||||
60 | status = "okay"; | ||||
61 | }; | ||||
62 | |||||
63 | &fpd_dma_chan4 { | ||||
64 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 65 | }; |
66 | |||||
67 | &fpd_dma_chan5 { | ||||
68 | status = "okay"; | ||||
69 | }; | ||||
70 | |||||
71 | &fpd_dma_chan6 { | ||||
72 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 73 | }; |
74 | |||||
75 | &fpd_dma_chan7 { | ||||
76 | status = "okay"; | ||||
77 | }; | ||||
78 | |||||
79 | &fpd_dma_chan8 { | ||||
80 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 81 | }; |
82 | |||||
83 | &lpd_dma_chan1 { | ||||
84 | status = "okay"; | ||||
85 | }; | ||||
86 | |||||
87 | &lpd_dma_chan2 { | ||||
88 | status = "okay"; | ||||
89 | }; | ||||
90 | |||||
91 | &lpd_dma_chan3 { | ||||
92 | status = "okay"; | ||||
93 | }; | ||||
94 | |||||
95 | &lpd_dma_chan4 { | ||||
96 | status = "okay"; | ||||
97 | }; | ||||
98 | |||||
99 | &lpd_dma_chan5 { | ||||
100 | status = "okay"; | ||||
101 | }; | ||||
102 | |||||
103 | &lpd_dma_chan6 { | ||||
104 | status = "okay"; | ||||
105 | }; | ||||
106 | |||||
107 | &lpd_dma_chan7 { | ||||
108 | status = "okay"; | ||||
109 | }; | ||||
110 | |||||
111 | &lpd_dma_chan8 { | ||||
112 | status = "okay"; | ||||
113 | }; | ||||
114 | |||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 115 | &gem0 { |
116 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 117 | phy-mode = "rgmii-id"; |
118 | phy-handle = <ðernet_phy0>; | ||||
119 | ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */ | ||||
120 | reg = <0>; | ||||
121 | }; | ||||
122 | ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */ | ||||
123 | reg = <7>; | ||||
124 | }; | ||||
125 | ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */ | ||||
126 | reg = <3>; | ||||
127 | }; | ||||
128 | ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */ | ||||
129 | reg = <8>; | ||||
130 | }; | ||||
131 | }; | ||||
132 | |||||
133 | &gem1 { | ||||
134 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 135 | phy-mode = "rgmii-id"; |
136 | phy-handle = <ðernet_phy7>; | ||||
137 | }; | ||||
138 | |||||
139 | &gem2 { | ||||
140 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 141 | phy-mode = "rgmii-id"; |
142 | phy-handle = <ðernet_phy3>; | ||||
143 | }; | ||||
144 | |||||
145 | &gem3 { | ||||
146 | status = "okay"; | ||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 147 | phy-mode = "rgmii-id"; |
148 | phy-handle = <ðernet_phy8>; | ||||
149 | }; | ||||
150 | |||||
151 | &gpio { | ||||
152 | status = "okay"; | ||||
153 | }; | ||||
154 | |||||
155 | &gpu { | ||||
156 | status = "okay"; | ||||
157 | }; | ||||
158 | |||||
159 | &i2c0 { | ||||
160 | clock-frequency = <400000>; | ||||
161 | status = "okay"; | ||||
162 | }; | ||||
163 | |||||
164 | &i2c1 { | ||||
165 | clock-frequency = <400000>; | ||||
166 | status = "okay"; | ||||
167 | }; | ||||
168 | |||||
Siva Durga Prasad Paladugu | df0dcf9 | 2017-03-04 12:16:47 +0530 | [diff] [blame] | 169 | &qspi { |
170 | status = "okay"; | ||||
171 | flash@0 { | ||||
Neil Armstrong | a009fa7 | 2019-02-10 10:16:20 +0000 | [diff] [blame] | 172 | compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ |
Siva Durga Prasad Paladugu | df0dcf9 | 2017-03-04 12:16:47 +0530 | [diff] [blame] | 173 | #address-cells = <1>; |
174 | #size-cells = <1>; | ||||
175 | reg = <0x0>; | ||||
Amit Kumar Mahapatra | a02408b | 2022-05-10 16:33:01 +0200 | [diff] [blame] | 176 | spi-tx-bus-width = <4>; |
Siva Durga Prasad Paladugu | df0dcf9 | 2017-03-04 12:16:47 +0530 | [diff] [blame] | 177 | spi-rx-bus-width = <4>; /* also DUAL configuration possible */ |
178 | spi-max-frequency = <108000000>; /* Based on DC1 spec */ | ||||
Michal Simek | 70fafdf | 2020-02-14 14:19:56 +0100 | [diff] [blame] | 179 | partition@0 { /* for testing purpose */ |
Siva Durga Prasad Paladugu | df0dcf9 | 2017-03-04 12:16:47 +0530 | [diff] [blame] | 180 | label = "qspi-fsbl-uboot"; |
181 | reg = <0x0 0x100000>; | ||||
182 | }; | ||||
Michal Simek | 70fafdf | 2020-02-14 14:19:56 +0100 | [diff] [blame] | 183 | partition@100000 { /* for testing purpose */ |
Siva Durga Prasad Paladugu | df0dcf9 | 2017-03-04 12:16:47 +0530 | [diff] [blame] | 184 | label = "qspi-linux"; |
185 | reg = <0x100000 0x500000>; | ||||
186 | }; | ||||
Michal Simek | 70fafdf | 2020-02-14 14:19:56 +0100 | [diff] [blame] | 187 | partition@600000 { /* for testing purpose */ |
Siva Durga Prasad Paladugu | df0dcf9 | 2017-03-04 12:16:47 +0530 | [diff] [blame] | 188 | label = "qspi-device-tree"; |
189 | reg = <0x600000 0x20000>; | ||||
190 | }; | ||||
Michal Simek | 70fafdf | 2020-02-14 14:19:56 +0100 | [diff] [blame] | 191 | partition@620000 { /* for testing purpose */ |
Siva Durga Prasad Paladugu | df0dcf9 | 2017-03-04 12:16:47 +0530 | [diff] [blame] | 192 | label = "qspi-rootfs"; |
193 | reg = <0x620000 0x5E0000>; | ||||
194 | }; | ||||
195 | }; | ||||
196 | }; | ||||
197 | |||||
Michal Simek | 6101515 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 198 | &rtc { |
199 | status = "okay"; | ||||
200 | }; | ||||
201 | |||||
202 | &uart0 { | ||||
203 | status = "okay"; | ||||
204 | }; | ||||
205 | |||||
206 | &uart1 { | ||||
207 | status = "okay"; | ||||
208 | }; | ||||
209 | |||||
210 | &watchdog0 { | ||||
211 | status = "okay"; | ||||
212 | }; | ||||
Michal Simek | e0afb5a | 2021-06-01 16:42:02 +0200 | [diff] [blame] | 213 | |
214 | &zynqmp_dpdma { | ||||
215 | status = "okay"; | ||||
216 | }; | ||||
217 | |||||
218 | &zynqmp_dpsub { | ||||
219 | status = "okay"; | ||||
220 | }; |