blob: f39dc426d685edd88f9b9dc4708750cd9211ac8e [file] [log] [blame]
Neil Armstrong159dc0c2024-11-15 16:44:15 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Qualcomm x1e80100 pinctrl
4 *
5 * (C) Copyright 2024 Linaro Ltd.
6 *
7 */
8
9#include <dm.h>
10
11#include "pinctrl-qcom.h"
12
13#define MAX_PIN_NAME_LEN 32
14static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
15
16static const struct pinctrl_function msm_pinctrl_functions[] = {
17 {"qup2_se5", 1},
Neil Armstrong550678432024-11-25 09:29:12 +010018 {"pcie3_clk", 1},
19 {"pcie4_clk", 1},
20 {"pcie5_clk", 1},
21 {"pcie6a_clk", 1},
22 {"pcie6b_clk", 1},
Neil Armstrong159dc0c2024-11-15 16:44:15 +010023 {"gpio", 0},
24};
25
26#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
27 { \
28 .name = pg_name, \
29 .ctl_reg = ctl, \
30 .io_reg = 0, \
31 .pull_bit = pull, \
32 .drv_bit = drv, \
33 .oe_bit = -1, \
34 .in_bit = -1, \
35 .out_bit = -1, \
36 }
37
38#define UFS_RESET(pg_name, ctl) \
39 { \
40 .name = pg_name, \
41 .ctl_reg = ctl, \
42 .io_reg = ctl + 0x4, \
43 .pull_bit = 3, \
44 .drv_bit = 0, \
45 .oe_bit = -1, \
46 .in_bit = -1, \
47 .out_bit = 0, \
48 }
49
50static const struct msm_special_pin_data msm_special_pins_data[] = {
51 [0] = UFS_RESET("ufs_reset", 0xf9000),
52 [1] = SDC_QDSD_PINGROUP("sdc2_clk", 0xf2000, 14, 6),
53 [2] = SDC_QDSD_PINGROUP("sdc2_cmd", 0xf2000, 11, 3),
54 [3] = SDC_QDSD_PINGROUP("sdc2_data", 0xf2000, 9, 0),
55};
56
57static const char *x1e80100_get_function_name(struct udevice *dev,
58 unsigned int selector)
59{
60 return msm_pinctrl_functions[selector].name;
61}
62
63static const char *x1e80100_get_pin_name(struct udevice *dev,
64 unsigned int selector)
65{
66 if (selector >= 238 && selector <= 241)
67 snprintf(pin_name, MAX_PIN_NAME_LEN,
68 msm_special_pins_data[selector - 238].name);
69 else
70 snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
71
72 return pin_name;
73}
74
75static unsigned int x1e80100_get_function_mux(__maybe_unused unsigned int pin,
76 unsigned int selector)
77{
78 return msm_pinctrl_functions[selector].val;
79}
80
81static struct msm_pinctrl_data x1e80100_data = {
82 .pin_data = {
83 .pin_count = 242,
84 .special_pins_start = 238,
85 .special_pins_data = msm_special_pins_data,
86 },
87 .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
88 .get_function_name = x1e80100_get_function_name,
89 .get_function_mux = x1e80100_get_function_mux,
90 .get_pin_name = x1e80100_get_pin_name,
91};
92
93static const struct udevice_id msm_pinctrl_ids[] = {
94 { .compatible = "qcom,x1e80100-tlmm", .data = (ulong)&x1e80100_data },
95 { /* Sentinel */ }
96};
97
98U_BOOT_DRIVER(pinctrl_x1e80100) = {
99 .name = "pinctrl_x1e80100",
100 .id = UCLASS_NOP,
101 .of_match = msm_pinctrl_ids,
102 .ops = &msm_pinctrl_ops,
103 .bind = msm_pinctrl_bind,
104};
105