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git01.mediatek.com / filogic / uboot / ec39e70adc4319de8dcdb2260d0e4b433eba3cf6 / . / configs / maxbcm_defconfig
blob: 7a5eeba022429fe70ec2d2d02a5d37a0eafc5d8a [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]2CONFIG_ARCH_MVEBU=y
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]3CONFIG_SYS_MALLOC_F_LEN=0x2000
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]4CONFIG_TARGET_MAXBCM=y
Stefan Roesec981c0e2015-11-19 11:03:25 +0100[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]6CONFIG_SPL=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]7# CONFIG_CMD_IMLS is not set
8# CONFIG_CMD_FLASH is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]9CONFIG_CMD_SF=y
10CONFIG_CMD_SPI=y
11CONFIG_CMD_I2C=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]12# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]13CONFIG_CMD_TFTPPUT=y
14CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]15CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]16CONFIG_CMD_PING=y
17CONFIG_CMD_TIME=y
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]18CONFIG_SPL_OF_TRANSLATE=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]19CONFIG_SPI_FLASH=y
Jagan Tekid651a102015-06-29 22:36:18 +0530[diff] [blame]20CONFIG_SPI_FLASH_BAR=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]21CONFIG_SPI_FLASH_MACRONIX=y
22CONFIG_SPI_FLASH_SPANSION=y
23CONFIG_SPI_FLASH_STMICRO=y
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]24CONFIG_DEBUG_UART=y
25CONFIG_DEBUG_UART_BASE=0xd0012000
26CONFIG_DEBUG_UART_CLOCK=250000000
27CONFIG_DEBUG_UART_SHIFT=2
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]28CONFIG_SYS_NS16550=y