Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Motorola MC5275EVB board. |
| 3 | * |
| 4 | * By Arthur Shipkowski <art@videon-central.com> |
| 5 | * Copyright (C) 2005 Videon Central, Inc. |
| 6 | * |
| 7 | * Based off of M5272C3 board code by Josef Baumgartner |
| 8 | * <josef.baumgartner@telex.de> |
| 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
| 29 | /* |
| 30 | * board/config.h - configuration options, board specific |
| 31 | */ |
| 32 | |
| 33 | #ifndef _M5275EVB_H |
| 34 | #define _M5275EVB_H |
| 35 | |
| 36 | /* |
| 37 | * High Level Configuration Options |
| 38 | * (easy to change) |
| 39 | */ |
| 40 | #define CONFIG_MCF52x2 /* define processor family */ |
| 41 | #define CONFIG_M5275 /* define processor type */ |
| 42 | #define CONFIG_M5275EVB /* define board type */ |
| 43 | |
| 44 | #define CONFIG_MCFTMR |
| 45 | |
| 46 | #define CONFIG_MCFUART |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 47 | #define CONFIG_SYS_UART_PORT (0) |
TsiChung Liew | bd05c6d | 2008-08-15 16:50:07 +0000 | [diff] [blame] | 48 | #define CONFIG_BAUDRATE 115200 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 49 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 50 | |
| 51 | /* Configuration for environment |
| 52 | * Environment is embedded in u-boot in the second sector of the flash |
| 53 | */ |
| 54 | #ifndef CONFIG_MONITOR_IS_IN_RAM |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 55 | #define CONFIG_ENV_OFFSET 0x4000 |
| 56 | #define CONFIG_ENV_SECT_SIZE 0x2000 |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 57 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 58 | #define CONFIG_ENV_IS_EMBEDDED 1 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 59 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 60 | #define CONFIG_ENV_ADDR 0xffe04000 |
| 61 | #define CONFIG_ENV_SECT_SIZE 0x2000 |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 62 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 63 | #endif |
| 64 | |
| 65 | /* |
| 66 | * BOOTP options |
| 67 | */ |
| 68 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 69 | #define CONFIG_BOOTP_BOOTPATH |
| 70 | #define CONFIG_BOOTP_GATEWAY |
| 71 | #define CONFIG_BOOTP_HOSTNAME |
| 72 | |
| 73 | /* Available command configuration */ |
| 74 | #include <config_cmd_default.h> |
| 75 | |
| 76 | #define CONFIG_CMD_PING |
| 77 | #define CONFIG_CMD_MII |
| 78 | #define CONFIG_CMD_NET |
| 79 | #define CONFIG_CMD_ELF |
| 80 | #define CONFIG_CMD_FLASH |
| 81 | #define CONFIG_CMD_I2C |
| 82 | #define CONFIG_CMD_MEMORY |
| 83 | #define CONFIG_CMD_DHCP |
| 84 | |
| 85 | #undef CONFIG_CMD_LOADS |
| 86 | #undef CONFIG_CMD_LOADB |
| 87 | |
| 88 | #define CONFIG_MCFFEC |
| 89 | #ifdef CONFIG_MCFFEC |
| 90 | #define CONFIG_NET_MULTI 1 |
| 91 | #define CONFIG_MII 1 |
TsiChung Liew | b316245 | 2008-03-30 01:22:13 -0500 | [diff] [blame] | 92 | #define CONFIG_MII_INIT 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 93 | #define CONFIG_SYS_DISCOVER_PHY |
| 94 | #define CONFIG_SYS_RX_ETH_BUFFER 8 |
| 95 | #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
| 96 | #define CONFIG_SYS_FEC0_PINMUX 0 |
| 97 | #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE |
| 98 | #define CONFIG_SYS_FEC1_PINMUX 0 |
| 99 | #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 100 | #define MCFFEC_TOUT_LOOP 50000 |
| 101 | #define CONFIG_HAS_ETH1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 102 | /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ |
| 103 | #ifndef CONFIG_SYS_DISCOVER_PHY |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 104 | #define FECDUPLEX FULL |
| 105 | #define FECSPEED _100BASET |
| 106 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 107 | #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
| 108 | #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 109 | #endif |
| 110 | #endif |
| 111 | #endif |
| 112 | |
| 113 | /* I2C */ |
| 114 | #define CONFIG_FSL_I2C |
| 115 | #define CONFIG_HARD_I2C /* I2C with hw support */ |
| 116 | #undef CONFIG_SOFT_I2C |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_I2C_SPEED 80000 |
| 118 | #define CONFIG_SYS_I2C_SLAVE 0x7F |
| 119 | #define CONFIG_SYS_I2C_OFFSET 0x00000300 |
| 120 | #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR |
| 121 | #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) |
| 122 | #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) |
| 123 | #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 124 | |
| 125 | #ifdef CONFIG_MCFFEC |
| 126 | #define CONFIG_ETHADDR 00:06:3b:01:41:55 |
| 127 | #define CONFIG_ETH1ADDR 00:0e:0c:bc:e5:60 |
| 128 | #endif |
| 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_PROMPT "-> " |
| 131 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 132 | |
| 133 | #if (CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | # define CONFIG_SYS_CBSIZE 1024 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 135 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | # define CONFIG_SYS_CBSIZE 256 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 137 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 139 | #define CONFIG_SYS_MAXARGS 16 |
| 140 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 141 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_LOAD_ADDR 0x800000 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 143 | |
| 144 | #define CONFIG_BOOTDELAY 5 |
| 145 | #define CONFIG_BOOTCOMMAND "bootm ffe40000" |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_MEMTEST_START 0x400 |
| 147 | #define CONFIG_SYS_MEMTEST_END 0x380000 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 148 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | #define CONFIG_SYS_HZ 1000 |
| 150 | #define CONFIG_SYS_CLK 150000000 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 151 | |
| 152 | /* |
| 153 | * Low Level Configuration Settings |
| 154 | * (address mappings, register initial values, etc.) |
| 155 | * You should know what you are doing if you make changes here. |
| 156 | */ |
| 157 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 158 | #define CONFIG_SYS_MBAR 0x40000000 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 159 | |
| 160 | /*----------------------------------------------------------------------- |
| 161 | * Definitions for initial stack pointer and data area (in DPRAM) |
| 162 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 163 | #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 |
| 164 | #define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ |
| 165 | #define CONFIG_SYS_GBL_DATA_SIZE 1000 /* bytes reserved for initial data */ |
| 166 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) |
| 167 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 168 | |
| 169 | /*----------------------------------------------------------------------- |
| 170 | * Start addresses for the final memory configuration |
| 171 | * (Set up by the startup code) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 172 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 173 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 174 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 175 | #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ |
TsiChung Liew | 7f1a046 | 2008-10-21 10:03:07 +0000 | [diff] [blame] | 176 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 177 | |
| 178 | #ifdef CONFIG_MONITOR_IS_IN_RAM |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 179 | #define CONFIG_SYS_MONITOR_BASE 0x20000 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 180 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 181 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 182 | #endif |
| 183 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 184 | #define CONFIG_SYS_MONITOR_LEN 0x20000 |
| 185 | #define CONFIG_SYS_MALLOC_LEN (256 << 10) |
| 186 | #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 187 | |
| 188 | /* |
| 189 | * For booting Linux, the board info and command line data |
| 190 | * have to be in the first 8 MB of memory, since this is |
| 191 | * the maximum mapped by the Linux kernel during initialization ?? |
| 192 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 193 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial mmap for Linux */ |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 194 | |
| 195 | /*----------------------------------------------------------------------- |
| 196 | * FLASH organization |
| 197 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 198 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 199 | #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ |
| 200 | #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 201 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 202 | #define CONFIG_SYS_FLASH_CFI 1 |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 203 | #define CONFIG_FLASH_CFI_DRIVER 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 204 | #define CONFIG_SYS_FLASH_SIZE 0x200000 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 205 | |
| 206 | /*----------------------------------------------------------------------- |
| 207 | * Cache Configuration |
| 208 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 209 | #define CONFIG_SYS_CACHELINE_SIZE 16 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 210 | |
| 211 | /*----------------------------------------------------------------------- |
| 212 | * Memory bank definitions |
| 213 | */ |
TsiChung Liew | 7f1a046 | 2008-10-21 10:03:07 +0000 | [diff] [blame] | 214 | #define CONFIG_SYS_CS0_BASE 0xffe00000 |
| 215 | #define CONFIG_SYS_CS0_CTRL 0x00001980 |
| 216 | #define CONFIG_SYS_CS0_MASK 0x001F0001 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 217 | |
TsiChung Liew | 7f1a046 | 2008-10-21 10:03:07 +0000 | [diff] [blame] | 218 | #define CONFIG_SYS_CS1_BASE 0x30000000 |
| 219 | #define CONFIG_SYS_CS1_CTRL 0x00001900 |
| 220 | #define CONFIG_SYS_CS1_MASK 0x00070001 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 221 | |
| 222 | /*----------------------------------------------------------------------- |
| 223 | * Port configuration |
| 224 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 225 | #define CONFIG_SYS_FECI2C 0x0FA0 |
Matthew Fettke | 9f3b3bb | 2008-01-24 14:02:32 -0600 | [diff] [blame] | 226 | |
| 227 | #endif /* _M5275EVB_H */ |