| Stefan Roese | c50ab39 | 2014-10-22 12:13:11 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 |
| 3 | * Marvell Semiconductor <www.marvell.com> |
| 4 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <asm/io.h> |
| 11 | #include <asm/arch/cpu.h> |
| 12 | #include <asm/arch/soc.h> |
| 13 | |
| 14 | /* |
| 15 | * mvebu_config_gpio - GPIO configuration |
| 16 | */ |
| 17 | void mvebu_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val, |
| 18 | u32 gpp0_oe, u32 gpp1_oe) |
| 19 | { |
| 20 | struct kwgpio_registers *gpio0reg = |
| 21 | (struct kwgpio_registers *)MVEBU_GPIO0_BASE; |
| 22 | struct kwgpio_registers *gpio1reg = |
| 23 | (struct kwgpio_registers *)MVEBU_GPIO1_BASE; |
| 24 | |
| 25 | /* Init GPIOS to default values as per board requirement */ |
| 26 | writel(gpp0_oe_val, &gpio0reg->dout); |
| 27 | writel(gpp1_oe_val, &gpio1reg->dout); |
| 28 | writel(gpp0_oe, &gpio0reg->oe); |
| 29 | writel(gpp1_oe, &gpio1reg->oe); |
| 30 | } |