blob: 60519c3b536cda11a0794c9979bab3fca46489a4 [file] [log] [blame]
Thomas Choufb798b12015-10-09 13:46:34 +08001menu "Timer Support"
2
3config TIMER
Bin Meng8a7b8642015-11-13 00:11:14 -08004 bool "Enable driver model for timer drivers"
Thomas Choufb798b12015-10-09 13:46:34 +08005 depends on DM
6 help
Bin Meng8a7b8642015-11-13 00:11:14 -08007 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
Thomas Choufb798b12015-10-09 13:46:34 +08009 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
11
Philipp Tomsich4fac4ea2017-07-28 17:38:42 +020012config SPL_TIMER
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
15 help
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
19 SPL build.
20
21config TPL_TIMER
22 bool "Enable driver model for timer drivers in TPL"
23 depends on TIMER && TPL
24 help
25 Enable support for timer drivers in TPL. These can be used to get
26 a timer value when in TPL, or perhaps for implementing a delay
27 function. This enables the drivers in drivers/timer as part of an
28 TPL build.
29
Simon Glasse7ca7da2022-04-30 00:56:53 -060030config VPL_TIMER
31 bool "Enable driver model for timer drivers in VPL"
32 depends on TIMER && VPL
33 default y if TPL_TIMER
34 help
35 Enable support for timer drivers in VPL. These can be used to get
36 a timer value when in VPL, or perhaps for implementing a delay
37 function. This enables the drivers in drivers/timer as part of an
38 TPL build.
39
Simon Glass32f6c172016-02-24 09:14:49 -070040config TIMER_EARLY
41 bool "Allow timer to be used early in U-Boot"
42 depends on TIMER
Simon Glass6abd89b2018-09-02 17:02:24 -060043 # initr_bootstage() requires a timer and is called before initr_dm()
44 # so only the early timer is available
45 default y if X86 && BOOTSTAGE
Simon Glass32f6c172016-02-24 09:14:49 -070046 help
47 In some cases the timer must be accessible before driver model is
48 active. Examples include when using CONFIG_TRACE to trace U-Boot's
49 execution before driver model is set up. Enable this option to
50 use an early timer. These functions must be supported by your timer
51 driver: timer_early_get_count() and timer_early_get_rate().
52
Thomas Chou221d2ac2015-10-22 22:28:53 +080053config ALTERA_TIMER
Bin Meng8a7b8642015-11-13 00:11:14 -080054 bool "Altera timer support"
Thomas Chou221d2ac2015-10-22 22:28:53 +080055 depends on TIMER
56 help
Bin Meng8a7b8642015-11-13 00:11:14 -080057 Select this to enable a timer for Altera devices. Please find
Thomas Chou221d2ac2015-10-22 22:28:53 +080058 details on the "Embedded Peripherals IP User Guide" of Altera.
59
Sean Anderson5a238652020-10-25 21:46:57 -040060config ANDES_PLMT_TIMER
Sean Anderson5abf1f32020-10-25 21:46:56 -040061 bool
Yu Chien Peter Linac5e68f2023-09-29 12:03:07 +080062 depends on RISCV_MMODE
63 help
64 The Andes PLMT block holds memory-mapped mtime register
65 associated with timer tick.
66
67config SPL_ANDES_PLMT_TIMER
68 bool
69 depends on SPL_RISCV_MMODE
Sean Anderson5abf1f32020-10-25 21:46:56 -040070 help
71 The Andes PLMT block holds memory-mapped mtime register
72 associated with timer tick.
73
Bin Meng19f88b22018-10-10 22:07:02 -070074config ARC_TIMER
75 bool "ARC timer support"
76 depends on TIMER && ARC && CLK
77 help
78 Select this to enable built-in ARC timers.
79 ARC cores may have up to 2 built-in timers: timer0 and timer1,
80 usually at least one of them exists. Either of them is supported
81 in U-Boot.
82
Stefan Herbrechtsmeier10ff2882022-08-05 08:16:28 +020083config ARM_TWD_TIMER
84 bool "ARM timer watchdog (TWD) timer support"
85 depends on TIMER && CLK
86 help
87 Select this to enable support for the ARM global timer watchdog timer.
88
Bin Meng19f88b22018-10-10 22:07:02 -070089config AST_TIMER
90 bool "Aspeed ast2400/ast2500 timer support"
91 depends on TIMER
92 default y if ARCH_ASPEED
93 help
94 Select this to enable timer for Aspeed ast2400/ast2500 devices.
95 This is a simple sys timer driver, it is compatible with lib/time.c,
96 but does not support any interrupts. Even though SoC has 8 hardware
97 counters, they are all treated as a single device by this driver.
98 This is mostly because they all share several registers which
99 makes it difficult to completely separate them.
100
101config ATCPIT100_TIMER
102 bool "ATCPIT100 timer support"
103 depends on TIMER
104 help
105 Select this to enable a ATCPIT100 timer which will be embedded
106 in AE3XX, AE250 boards.
107
Wenyou.Yang@microchip.comce8a36f2017-08-15 17:40:26 +0800108config ATMEL_PIT_TIMER
109 bool "Atmel periodic interval timer support"
110 depends on TIMER
111 help
112 Select this to enable a periodic interval timer for Atmel devices,
113 it is designed to offer maximum accuracy and efficient management,
114 even for systems with long response time.
115
Eugen Hristev59d62892022-04-04 11:35:51 +0300116config SPL_ATMEL_PIT_TIMER
117 bool "Atmel periodic interval timer support in SPL"
118 depends on SPL_TIMER
119 help
120 Select this to enable a periodic interval timer for Atmel devices,
121 it is designed to offer maximum accuracy and efficient management,
122 even for systems with long response time.
123 Select this to be available in SPL.
124
Clément Léger7e5c11b2022-03-31 10:55:06 +0200125config ATMEL_TCB_TIMER
126 bool "Atmel timer counter support"
127 depends on TIMER
128 depends on ARCH_AT91
129 help
130 Select this to enable the use of the timer counter as a monotonic
131 counter.
132
Eugen Hristev118141e2022-04-04 11:35:50 +0300133config SPL_ATMEL_TCB_TIMER
134 bool "Atmel timer counter support in SPL"
135 depends on SPL_TIMER
136 depends on ARCH_AT91
137 help
138 Select this to enable the use of the timer counter as a monotonic
139 counter in SPL.
140
Michal Simekc3caac52018-04-17 13:40:46 +0200141config CADENCE_TTC_TIMER
142 bool "Cadence TTC (Triple Timer Counter)"
143 depends on TIMER
144 help
145 Enables support for the cadence ttc driver. This driver is present
146 on Xilinx Zynq and ZynqMP SoCs.
147
Marek Vasut442c0f12018-08-18 15:58:32 +0200148config DESIGNWARE_APB_TIMER
149 bool "Designware APB Timer"
150 depends on TIMER
151 help
152 Enables support for the Designware APB Timer driver. This timer is
153 present on Altera SoCFPGA SoCs.
154
Sergei Antonov4803f1d2023-02-13 20:34:36 +0300155config FTTMR010_TIMER
156 bool "Faraday Technology timer support"
157 depends on TIMER
158 help
159 Select this to enable support for the timer found on
160 devices using Faraday Technology's IP.
161
Nick Hawkins3cd8cfb2022-06-08 16:21:35 -0500162config GXP_TIMER
163 bool "HPE GXP Timer"
164 depends on TIMER
165 help
166 Enables support for the GXP Timer driver. This timer is
167 present on HPE GXP SoCs.
168
Bin Meng19f88b22018-10-10 22:07:02 -0700169config MPC83XX_TIMER
170 bool "MPC83xx timer support"
171 depends on TIMER
Bin Mengb2aa4c52015-11-13 00:11:24 -0800172 help
Bin Meng19f88b22018-10-10 22:07:02 -0700173 Select this to enable support for the timer found on
174 devices based on the MPC83xx family of SoCs.
Bin Mengb2aa4c52015-11-13 00:11:24 -0800175
Marek Vasut6be61c62019-05-04 17:30:58 +0200176config RENESAS_OSTM_TIMER
177 bool "Renesas RZ/A1 R7S72100 OSTM Timer"
178 depends on TIMER
179 help
180 Enables support for the Renesas OSTM Timer driver.
181 This timer is present on Renesas RZ/A1 R7S72100 SoCs.
182
Bin Meng917d2b82021-07-28 12:00:22 +0800183config X86_TSC_TIMER_FREQ
184 int "x86 TSC timer frequency in Hz"
Bin Meng855e6572018-10-13 20:52:10 -0700185 depends on X86_TSC_TIMER
Bin Meng917d2b82021-07-28 12:00:22 +0800186 default 1000000000
Bin Meng855e6572018-10-13 20:52:10 -0700187 help
Bin Meng917d2b82021-07-28 12:00:22 +0800188 Sets the estimated CPU frequency in Hz when TSC is used as the
Bin Meng855e6572018-10-13 20:52:10 -0700189 early timer and the frequency can neither be calibrated via some
190 hardware ways, nor got from device tree at the time when device
191 tree is not available yet.
192
Stephan Gerhold7b0c1c52020-01-04 18:45:15 +0100193config NOMADIK_MTU_TIMER
194 bool "Nomadik MTU Timer"
195 depends on TIMER
196 help
197 Enables support for the Nomadik Multi Timer Unit (MTU),
198 used in ST-Ericsson Ux500 SoCs.
199 The MTU provides 4 decrementing free-running timers.
200 At the moment, only the first timer is used by the driver.
201
Jim Liu5cb640a2022-04-19 13:32:22 +0800202config NPCM_TIMER
203 bool "Nuvoton NPCM timer support"
204 depends on TIMER
205 help
206 Select this to enable a timer on Nuvoton NPCM SoCs.
207 NPCM timer module has 5 down-counting timers, only the first timer
208 is used to implement timer ops. No support for early timer and
209 boot timer.
210
Mugunthan V Nafae3702015-12-24 16:08:07 +0530211config OMAP_TIMER
212 bool "Omap timer support"
213 depends on TIMER
214 help
215 Select this to enable an timer for Omap devices.
216
Michael Wallef874e092022-08-17 21:37:51 +0200217config ORION_TIMER
218 bool "Orion timer support"
219 depends on TIMER
Stefan Roese70280f22022-09-15 16:20:37 +0200220 default y if ARCH_KIRKWOOD || (ARCH_MVEBU && ARMADA_32BIT)
221 select TIMER_EARLY if ARCH_MVEBU
Michael Wallef874e092022-08-17 21:37:51 +0200222 help
Stefan Roese70280f22022-09-15 16:20:37 +0200223 Select this to enable an timer for Orion and Armada devices
224 like Armada XP etc.
Michael Wallef874e092022-08-17 21:37:51 +0200225
Bin Meng25399032018-12-12 06:12:27 -0800226config RISCV_TIMER
227 bool "RISC-V timer support"
228 depends on TIMER && RISCV
229 help
Sean Anderson9baaaef2020-09-28 10:52:21 -0400230 Select this to enable support for a generic RISC-V S-Mode timer
231 driver.
Bin Meng25399032018-12-12 06:12:27 -0800232
Bin Meng19f88b22018-10-10 22:07:02 -0700233config ROCKCHIP_TIMER
234 bool "Rockchip timer support"
maxims@google.comf57bd002017-01-18 13:44:55 -0800235 depends on TIMER
maxims@google.comf57bd002017-01-18 13:44:55 -0800236 help
Bin Meng19f88b22018-10-10 22:07:02 -0700237 Select this to enable support for the timer found on
238 Rockchip devices.
239
240config SANDBOX_TIMER
241 bool "Sandbox timer support"
242 depends on SANDBOX && TIMER
243 help
244 Select this to enable an emulated timer for sandbox. It gets
245 time from host os.
maxims@google.comf57bd002017-01-18 13:44:55 -0800246
William Zhang38c26de2022-08-23 21:44:32 -0700247config ARM_GLOBAL_TIMER
248 bool "ARM Cortex A9 global timer support"
Patrice Chotard200a7992017-02-21 13:37:05 +0100249 depends on TIMER
William Zhang38c26de2022-08-23 21:44:32 -0700250 depends on ARM
Patrice Chotard200a7992017-02-21 13:37:05 +0100251 default y if ARCH_STI
252 help
William Zhang38c26de2022-08-23 21:44:32 -0700253 Select this to enable global timer found on ARM Cortex A9
254 based devices.
Patrice Chotard200a7992017-02-21 13:37:05 +0100255
Andre Przywara31ab0fd2022-10-20 23:10:23 +0100256config SP804_TIMER
257 bool "ARM SP804 timer support"
258 depends on TIMER
259 help
260 ARM SP804 dual timer IP support
261
Patrice Chotardfdfefdc2018-02-07 10:44:45 +0100262config STM32_TIMER
Bin Meng19f88b22018-10-10 22:07:02 -0700263 bool "STM32 timer support"
Patrice Chotardfdfefdc2018-02-07 10:44:45 +0100264 depends on TIMER
265 help
266 Select this to enable support for the timer found on
267 STM32 devices.
268
Svyatoslav Ryhel4f89aa92023-02-01 10:53:02 +0200269config TEGRA_TIMER
270 bool "Tegra timer support"
271 depends on TIMER
272 select TIMER_EARLY
273 help
274 Select this to enable support for the timer found on
275 Tegra devices.
276
Bin Meng19f88b22018-10-10 22:07:02 -0700277config X86_TSC_TIMER
278 bool "x86 Time-Stamp Counter (TSC) timer support"
279 depends on TIMER && X86
Mario Six3c516552018-08-06 10:23:38 +0200280 help
Bin Meng19f88b22018-10-10 22:07:02 -0700281 Select this to enable Time-Stamp Counter (TSC) timer for x86.
Mario Six3c516552018-08-06 10:23:38 +0200282
Simon Glassd3edd422019-12-06 21:41:49 -0700283config X86_TSC_READ_BASE
284 bool "Read the TSC timer base on start-up"
285 depends on X86_TSC_TIMER
286 help
287 On x86 platforms the TSC timer tick starts at the value 0 on reset.
288 This it makes no sense to read the timer on boot and use that as the
289 base, since we will miss some time taken to load U-Boot, etc. This
290 delay is controlled by the SoC and we cannot reduce it, but for
291 bootstage we want to record the time since reset as accurately as
292 possible.
293
294 The only exception is when U-Boot is used as a secondary bootloader,
295 where this option should be enabled.
296
Simon Glassbba203e2019-12-06 21:41:50 -0700297config TPL_X86_TSC_TIMER_NATIVE
298 bool "x86 TSC timer uses native calibration"
299 depends on TPL && X86_TSC_TIMER
300 help
301 Selects native timer calibration for TPL and don't include the other
302 methods in the code. This helps to reduce code size in TPL and works
303 on fairly modern Intel chips. Code-size reductions is about 700
304 bytes.
305
developer4a347352018-11-15 10:07:56 +0800306config MTK_TIMER
307 bool "MediaTek timer support"
308 depends on TIMER
309 help
310 Select this to enable support for the timer found on
311 MediaTek devices.
312
Claudiu Beznea5669c3d2020-09-07 18:36:33 +0300313config MCHP_PIT64B_TIMER
314 bool "Microchip 64-bit periodic interval timer support"
315 depends on TIMER
316 help
317 Select this to enable support for Microchip 64-bit periodic
318 interval timer.
319
Giulio Benetti9aed42b2021-05-13 12:18:31 +0200320config IMX_GPT_TIMER
321 bool "NXP i.MX GPT timer support"
322 depends on TIMER
323 help
324 Select this to enable support for the timer found on
325 NXP i.MX devices.
326
Michal Simeke8e52772022-06-24 14:16:32 +0200327config XILINX_TIMER
328 bool "Xilinx timer support"
329 depends on TIMER
330 select REGMAP
Michal Simek8d2bea42022-06-23 13:08:30 +0200331 select SPL_REGMAP if SPL
Michal Simeke8e52772022-06-24 14:16:32 +0200332 help
333 Select this to enable support for the timer found on
334 any Xilinx boards (axi timer).
335
Kuan Lim Leeeb66fc32023-09-19 15:30:36 +0800336config STARFIVE_TIMER
337 bool "Starfive timer support"
338 depends on TIMER
339 help
340 Select this to enable support for the timer found on
341 Starfive SoC.
342
Thomas Choufb798b12015-10-09 13:46:34 +0800343endmenu