Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
Adam Ford | d36b102 | 2019-08-14 08:29:25 -0500 | [diff] [blame] | 3 | CONFIG_ARCH_CPU_INIT=y |
Masahiro Yamada | af908ee | 2015-02-20 17:04:01 +0900 | [diff] [blame] | 4 | CONFIG_ARCH_AT91=y |
Tom Rini | 07edfae | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 5 | CONFIG_SYS_TEXT_BASE=0x21F00000 |
Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 6 | CONFIG_SYS_MALLOC_LEN=0x80000 |
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 7 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 8 | CONFIG_TARGET_MEESC=y |
Tom Rini | 2e262c4 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 9 | CONFIG_NR_DRAM_BANKS=1 |
Markus Klotzbuecher | 7bd60e6 | 2019-05-15 15:15:54 +0200 | [diff] [blame] | 10 | CONFIG_ENV_OFFSET=0xC0000 |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 11 | CONFIG_DM_GPIO=y |
Tom Rini | 8461027 | 2020-07-28 08:46:52 -0400 | [diff] [blame] | 12 | CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" |
Tom Rini | 0997ee0 | 2021-08-23 10:25:31 -0400 | [diff] [blame] | 13 | CONFIG_SYS_LOAD_ADDR=0x20100000 |
Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 14 | CONFIG_FIT=y |
Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 15 | CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" |
Heiko Schocher | 0b368b1 | 2016-06-07 08:31:14 +0200 | [diff] [blame] | 16 | CONFIG_BOOTDELAY=3 |
Simon Glass | 4be229d | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 17 | CONFIG_USE_PREBOOT=y |
Simon Glass | 7a99a87 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 18 | CONFIG_BOARD_EARLY_INIT_F=y |
Tom Rini | f92b6fa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 19 | CONFIG_MISC_INIT_R=y |
Tom Rini | f852e73 | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 20 | CONFIG_HUSH_PARSER=y |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 21 | # CONFIG_CMD_BDI is not set |
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 22 | CONFIG_CMD_BOOTZ=y |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 23 | # CONFIG_CMD_LOADS is not set |
Tom Rini | 00448d2 | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 24 | CONFIG_CMD_NAND=y |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 25 | # CONFIG_CMD_SETEXPR is not set |
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 26 | CONFIG_CMD_DHCP=y |
27 | CONFIG_CMD_PING=y | ||||
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 28 | CONFIG_OF_CONTROL=y |
Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 29 | CONFIG_ENV_IS_IN_NAND=y |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 30 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 31 | CONFIG_DM=y |
32 | CONFIG_CLK=y | ||||
33 | CONFIG_CLK_AT91=y | ||||
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 34 | CONFIG_AT91_GPIO=y |
Tom Rini | 9834b90 | 2017-03-13 13:48:42 -0400 | [diff] [blame] | 35 | # CONFIG_MMC is not set |
Tom Rini | e799f92 | 2019-12-04 17:18:38 -0500 | [diff] [blame] | 36 | CONFIG_MTD=y |
Miquel Raynal | d093536 | 2019-10-03 19:50:03 +0200 | [diff] [blame] | 37 | CONFIG_MTD_RAW_NAND=y |
Stefan Roese | 23b37f9 | 2019-08-22 12:28:04 +0200 | [diff] [blame] | 38 | # CONFIG_SYS_NAND_USE_FLASH_BBT is not set |
Adam Ford | 9c51918 | 2018-07-08 08:11:07 -0500 | [diff] [blame] | 39 | CONFIG_NAND_ATMEL=y |
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 40 | CONFIG_DM_SPI_FLASH=y |
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 41 | CONFIG_SPI_FLASH_ATMEL=y |
42 | CONFIG_SPI_FLASH_DATAFLASH=y | ||||
Tom Rini | 650378b | 2021-11-07 22:59:48 -0500 | [diff] [blame] | 43 | CONFIG_MACB=y |
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 44 | CONFIG_PINCTRL=y |
45 | CONFIG_PINCTRL_AT91=y | ||||
46 | CONFIG_DM_SERIAL=y | ||||
47 | CONFIG_ATMEL_USART=y | ||||
Adam Ford | 4e96ff8 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 48 | CONFIG_SPI=y |
Wenyou.Yang@microchip.com | cc2eca0 | 2017-07-21 17:06:40 +0800 | [diff] [blame] | 49 | CONFIG_DM_SPI=y |